Signal Equalization Apparatus for Gigabit Ethernet Inter-Symbol Interference

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Solution Overview

Problem

In Gigabit Ethernet communication systems, the receiver faces severe inter-symbol interference due to frequency selective effects, leading to slow convergence of equalizer coefficients and unstable connections, as existing technologies struggle to efficiently eliminate inter-symbol interference within the limited timing budget.

Innovation Solution

A signal equalization apparatus and method that includes a channel length estimation circuit, processing circuit, feed-forward equalizer, auto gain control circuit, signal adding circuit, data slicer, and feedback equalizer, which quickly determine and update feed-forward and feedback equalizer coefficients using pre-stored reference data to reduce inter-symbol interference and enhance signal-to-noise ratio.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional equalizer convergence methods are used, then the equalizer can eliminate inter-symbol interference, but the convergence time is too long and connection establishment fails within the timing budget

Engineering Contradiction:
Improveconnection stabilityVSAvoidconvergence time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing optimal equalizer coefficients in a lookup table before actual communication occurs. The channel length estimation circuit determines the channel length, and the processing circuit retrieves pre-computed coefficients from reference data, eliminating the need for time-consuming real-time convergence and enabling immediate effective equalization within the timing budget

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the parameter approach by switching from dynamic real-time coefficient adjustment to static pre-computed coefficient retrieval. By estimating channel length as a key parameter and using it to index into pre-stored coefficient sets, the system achieves rapid adaptation without iterative convergence, resolving the time-reliability contradiction

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the equalizer coefficients are updated in real-time during convergence, then the equalizer can adapt to channel conditions, but the interaction with echo canceller and timing recovery module causes even longer convergence time or makes convergence impossible

Engineering Contradiction:
Improveequalizer adaptation capabilityVSAvoidconvergence time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent extracts the coefficient adaptation function from the interactive convergence process among multiple modules. By using channel length estimation to directly retrieve coefficients from reference data, the system separates the adaptation mechanism from the problematic real-time interaction between feed-forward equalizer, echo canceller, and timing recovery module, achieving adaptation without convergence delays

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces channel length estimation as an intermediary that mediates between the input signal and the equalizer coefficients. Instead of direct real-time interaction between multiple adaptive modules, the channel length serves as an intermediate parameter that enables coefficient selection, breaking the harmful interaction cycle and enabling rapid adaptation

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11206159B2Signal equalization apparatus and signal equalization method
Publication Date: 2021.12.21 REALTEK SEMICON CORP
  • US11206159B2 patent drawing
  • US11206159B2 patent drawing
  • US11206159B2 patent drawing

AI summary

The present disclosure discloses a signal equalization apparatus. A channel length estimation circuit determines a transmission channel length of the input signal such that a processing circuit retrieves predetermined feed-forward equalizer coefficients. A feed-forward equalizer equalizes the input signal according to operation feed-forward equalizer coefficients. An auto gain circuit amplifies the input signal according to an offset signal. A signal adding circuit adds the amplified input signal and a feedback adjusting signal to generate an added input signal. A data slicer generates a data-slicing result and the offset signal according to reference thresholds based on the added input signal. A feedback equalizer equalizes the data-slicing result to generate the feedback adjusting signal according to operation feedback equalizer coefficients. The feed-forward equalizer and the feedback equalizer keeps updating the equalizer coefficients such that a signal interference noise is eliminated rapidly to increase a signal and noise ratio of the system.