Digital Signal Error Concealment with Distributed Complexity

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Solution Overview

Problem

Current digital signal processing techniques face high computational complexity when dealing with transmission errors, particularly in mobile and packet networks, leading to increased energy consumption and reduced battery autonomy in mobile devices, due to the need for extensive analysis and extrapolation of erased frames in coding schemes like CELP and PCM.

Innovation Solution

A method that distributes the calculation load by performing preparation and concealment steps in different time intervals, reducing the worst-case complexity and energy consumption by executing these steps over multiple frames rather than during the occurrence of an erased frame.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If extensive analysis and extrapolation of erased frames is performed during the occurrence of transmission errors, then transmission error concealment quality is improved, but computational complexity and energy consumption increase

Engineering Contradiction:
Improvetransmission error concealment qualityVSAvoidenergy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent performs the complex analysis step during valid frames (when data is available) rather than during erased frames. The decoder analyzes the signal characteristics and prepares concealment parameters in advance, so that when transmission errors occur, the actual concealment operation can be performed quickly with minimal computational load, thus reducing energy consumption during error events while maintaining concealment quality.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If extensive analysis and extrapolation of erased frames is performed during the occurrence of transmission errors, then transmission error concealment quality is improved, but computational complexity increases

Engineering Contradiction:
Improvetransmission error concealment qualityVSAvoidcomputational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The complex signal analysis and parameter preparation are performed during valid frames when computational resources are available, distributing the computational load over time. This prevents complexity spikes during erased frames while maintaining the ability to perform high-quality concealment when needed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The concealment process is divided into two distinct steps: an analysis step that requires extensive computation and a concealment operation step that requires minimal computation. By segmenting the process this way, the patent reduces the instantaneous computational complexity during error events while maintaining overall concealment quality.

Inventive Principle:
Principle #1Segmentation

3Reliability

If preparation and concealment steps are performed during the occurrence of an erased frame, then transmission error concealment is achieved, but processing efficiency decreases

Engineering Contradiction:
Improvetransmission error concealmentVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The analysis and preparation of concealment parameters are performed in advance during valid frames, so that when an erased frame occurs, the actual concealment operation can be executed efficiently without the overhead of extensive analysis during the error event, thereby improving processing efficiency while maintaining concealment capability.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20100306625A1Transmission error dissimulation in a digital signal with complexity distribution
Publication Date: 2010.12.02 ORANGE SA
  • US20100306625A1 patent drawing
  • US20100306625A1 patent drawing
  • US20100306625A1 patent drawing

AI summary

The present invention relates to a method of transmission error concealment in a digital signal split up into a plurality of successive frames associated with different time intervals in which, on reception, the signal might comprise erased frames and valid frames and in order to replace at least the first erased frame (N) after a valid frame, at least two steps are performed, a first step (E1) of preparation not producing any missing sample and comprising at least one analysis of a valid decoded signal and a second step (E2) of concealment producing the missing samples of the signal corresponding to said erased frame. The first step and the second step are executed in different time intervals.The invention relates also to a device of concealment implementing the method according to the invention as well as a decoder comprising such a device. The invention allows the distribution of the error concealment complexity on different time intervals.