Signal Error Propagation in System Models
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Solution Overview
Problem
Current software verification tools fail to directly handle signal value errors, which can lead to unpredictable behavior and performance issues in systems due to floating-point representation errors, hardware inaccuracies, and mixed continuous-discrete computations, and existing approaches rely on conservative error thresholds that do not account for timing jitter and non-deterministic behavior.
Innovation Solution
The solution involves propagating signal value errors through functional blocks in system models using interval arithmetic to analyze and quantify their impact, enabling the detection of error-induced underflow and overflow, and determining if errors can cause mode changes or anomalous behavior, employing a software verification tool that computes ranges of output signals and represents error characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conservative error thresholds are used to verify system correctness, then reliability is improved, but measurement precision deteriorates because the thresholds do not account for timing jitter and non-deterministic behavior
Solution Approach 1:
The patent transforms the verification approach by changing the parameter representation from fixed conservative thresholds to dynamic error intervals that capture timing jitter and non-deterministic behavior. Instead of using static threshold values, the system represents errors as intervals with lower and upper bounds that evolve through the dataflow graph, allowing precise characterization of uncertain parameters while maintaining reliability verification.
Solution Approach 2:
The patent adds a temporal dimension to error analysis by propagating error intervals through the dataflow graph over time. Rather than checking against a single static threshold, the system tracks how errors evolve through multiple computation stages, incorporating timing information and non-deterministic behavior into a multi-dimensional verification framework that preserves both reliability and precision.
2Device complexity
If signal value errors are not handled, then device complexity is reduced, but reliability deteriorates due to unpredictable behavior from floating-point errors, hardware inaccuracies, and mixed computations
Solution Approach 1:
The patent introduces error intervals as an intermediary representation between raw signal values and final verification results. Instead of directly handling complex floating-point errors and hardware inaccuracies, the system uses error intervals as a mediating abstraction that captures the essence of uncertainty without requiring full complexity of underlying error sources, thus maintaining reliability while managing complexity.
Solution Approach 2:
The patent segments the error analysis process into distinct stages corresponding to different functional blocks in the dataflow graph. By dividing the system into manageable segments and propagating error intervals through each segment separately, the verification tool can handle reliability concerns systematically without being overwhelmed by the overall system complexity, allowing modular analysis of floating-point errors, hardware inaccuracies, and mixed computations.
3Measurement precision
If error propagation analysis is performed through all functional blocks, then measurement precision is improved, but loss of time increases due to comprehensive range computation
Solution Approach 1:
The patent performs preliminary error interval computation at each functional block before proceeding to the next stage. By calculating error ranges in advance for each block and propagating them forward, the system avoids redundant computations later in the verification process. This preliminary action approach maintains high measurement precision in error impact analysis while reducing overall verification time through efficient staged computation.
Solution Approach 2:
The patent maintains continuous error propagation through the dataflow graph without interrupting the main verification flow. Instead of performing discrete, time-consuming error analyses at each stage, the system continuously updates error intervals as data flows through functional blocks, keeping the useful action of verification proceeding uninterrupted while accumulating precise error information along the way.
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AI summary
Embodiments of the present subject matter can enable the analysis of signal value errors for system models. In an example, signal value errors can be propagated through the functional blocks of a system model to analyze possible effects as the signal value errors impact incident functional blocks. This propagation of the errors can be applicable to many models of computation including avionics models, synchronous data flow, and Kahn process networks.