Signal Format Conversion via Synchronized Reference Clocks
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Solution Overview
Problem
Conversion of data signals between different signal formats and rates in Optical Transport Networks (OTN) is challenging due to the use of different transport containers and independent reference clocks, requiring complex asynchronous demapping and mapping processes.
Innovation Solution
Synchronization of reference clocks between signal formats simplifies the conversion process by allowing signal content copying, eliminating the need for complex asynchronous demapping and mapping, particularly by synchronizing the period of ODTU3.ts structures with ODTU4.ts structures, and using synchronized reference clocks to match signal periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If asynchronous demapping and mapping processes are used to convert signals between different OTN levels, then signal format conversion can be achieved, but the process complexity and device cost increase significantly
Solution Approach 1:
The patent changes the clock rate parameter of the reference clock from its original value to a synchronized value that is an integer multiple or fraction of the target signal's clock rate. This parameter change enables direct synchronous mapping without complex asynchronous demapping and mapping processes, thereby reducing device complexity while maintaining signal format conversion capability
Solution Approach 2:
The patent introduces a synchronized reference clock as an intermediary element that mediates between the source and target signal formats. This intermediary clock signal serves as a common timing reference that enables direct mapping relationships, eliminating the need for complex asynchronous conversion processes
2Reliability
If independent reference clocks are used for different signal formats, then each signal format can maintain its own timing characteristics, but the conversion between formats becomes more complex
Solution Approach 1:
The patent merges the independent reference clocks into a single synchronized reference clock system. By deriving the reference clock from the same source as the target signal and setting its rate to an integer multiple or fraction, the patent creates a unified timing framework that maintains timing integrity while simplifying conversion complexity
3Speed
If complex 100 G trunk devices are used for signal conversion, then high-rate signal conversion can be achieved, but device cost and complexity increase
Solution Approach 1:
The patent segments the high-rate signal conversion function into lower-rate component operations. By using a reference clock that is an integer multiple or fraction of the target rate, the conversion can be performed through simpler, lower-rate devices that process signals in manageable segments rather than requiring complex high-rate trunk devices
Data Source
AI summary
Signal format conversion apparatus and methods involve converting data signals between a first signal format associated with a first reference clock rate and a second signal format that is different from the first signal format and is associated with a second reference clock rate different from the first reference clock rate. A period of the second signal format is changed to match a period of a third signal format by controlling a synchronized second reference clock rate that is applied in converting data signals between the first signal format and the second signal format. The synchronized second reference clock rate is different from the second reference clock rate and is synchronized with a third reference clock rate. The third reference clock rate is associated with the third signal format. Such synchronization simplifies conversion of signals between the second and third signal formats.