Signal Generating Circuit Pull-Down Control for Display Shift Registers
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Solution Overview
Problem
Flat panel display devices, such as LCD and OLED displays, face issues with image display quality due to errors in scan signal waveforms outputted through shift registers, leading to incorrect image data and potential operate failures, especially when susceptible to noise interference causing flicker.
Innovation Solution
A signal generating circuit that resets nodes in shift registers before image display by using a pull-down control signal and a starting signal, where the pull-down control signal switches to an enabling voltage level before the starting signal, ensuring the nodes are set to a disabling voltage level before the first frame is displayed, thereby preventing noise interference and ensuring correct image display.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the shift register operates without preliminary reset, then the device complexity is reduced, but the reliability deteriorates due to noise interference causing flicker and operation failures
Solution Approach 1:
The patent applies preliminary action by resetting the nodes in the shift register before the display operation begins. The pull-down control signal is generated in advance to clear any residual charges or noise from the nodes, ensuring they are in a known stable state before the display frame starts. This preliminary reset action prevents noise interference during the actual display operation, thereby improving reliability without requiring continuous complex control mechanisms throughout the entire operation cycle.
Solution Approach 2:
The patent implements preliminary anti-action by applying a pull-down control signal before the display operation to counteract potential noise interference. This signal actively opposes any accumulated charges or electromagnetic interference that might occur during the display cycle, creating a protective effect that prevents flicker and operation failures. The anti-action is applied in advance and during critical periods, rather than reacting to problems after they occur.
2Manufacturing precision
If the pull-down control signal is applied before the starting signal, then the image display quality is improved by preventing noise interference, but the loss of time increases due to the additional reset period
Solution Approach 1:
The pull-down control signal is applied in advance before the starting signal to reset the nodes to a known state, ensuring clean signal levels before display operation begins. This preliminary action prevents noise accumulation that would otherwise degrade image quality, while the timing is optimized so the reset occurs during the vertical blanking interval or before the active display period, minimizing impact on overall frame rate.
Solution Approach 2:
The signal generating circuit produces periodic pull-down control signals that are synchronized with the display frame rate. These signals are applied at regular intervals before each frame's active display period, ensuring consistent noise prevention and image quality maintenance. The periodic timing allows the system to maintain high image quality while efficiently utilizing the time available in each display cycle.
Data Source
AI summary
A signal generating circuit for providing signals to a gate driving circuit of a display device is provided. The gate driving circuit has plural shift registers each having a main circuit unit and a discharge circuit unit. The discharge circuit units of at least some of the shift registers are configured to receive a pull-down control signal. The main circuit unit of a first stage shift register of the shift registers is configured to receive a starting signal. The signal generating circuit includes a first circuit unit that is configured to output the pull-down control signal and the starting signal to the gate driving circuit. The starting signal switches from a disabling voltage level to an enabling voltage level at a first time point. The pull-down control signal switches from a disabling voltage level to an enabling voltage level at a second time point before the first time point.