Signal Generation Circuit for Class-D Amplifier Startup Noise

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Solution Overview

Problem

Class-D amplifiers with fixed gain require a long startup time due to fluctuating power supply voltages, leading to increased noise during mute and pop noise issues when connected to digital/analog conversion circuits.

Innovation Solution

A signal generation circuit that adjusts the starting voltage of the ramp voltage based on the power supply voltage, using a variable resistance circuit to ensure the Class-D amplifiers are slightly clipped initially, reducing the startup time while minimizing pop noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If a bias voltage generation circuit applies a ramp voltage that gradually rises from startup, then pop noise from the speaker is suppressed, but the startup time period increases

Engineering Contradiction:
Improvepop noiseVSAvoidstartup time period
Core Design Contradiction:
Object-affected harmful factorsVSLoss of time

Solution Approach 1:

The patent applies dynamics by making the ramp voltage generation adaptive rather than fixed. The circuit dynamically adjusts the ramp voltage characteristics based on detected power supply voltage fluctuations, allowing the startup process to be optimized in real-time according to actual operating conditions, thereby reducing startup time while maintaining pop noise suppression.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes parameters by detecting power supply voltage fluctuations and adjusting the ramp voltage generation accordingly. The bias voltage generation circuit modifies its operating parameters (such as ramp voltage slope or generation timing) based on the detected power supply conditions, enabling faster startup when power supply is stable while still suppressing pop noise when fluctuations occur.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the CDA is connected to a digital/analog conversion circuit, then signal conversion capability is improved, but output noise increases during mute and no signal input

Engineering Contradiction:
Improvesignal conversion capabilityVSAvoidoutput noise
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The patent uses the bias voltage generation circuit as an intermediary between the digital/analog conversion circuit and the Class-D amplifier. This intermediary circuit conditions the signal by providing proper bias voltage and ramp voltage, which prevents the Class-D amplifier from generating excessive noise during mute or no-signal conditions, while still allowing full signal conversion capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10903744B2Signal generation circuit
Publication Date: 2021.01.26 KK TOSHIBA
  • US10903744B2 patent drawing
  • US10903744B2 patent drawing
  • US10903744B2 patent drawing

AI summary

A signal generation circuit of an embodiment is a signal generation circuit giving a generated signal corresponding to an input signal to an amplification circuit configured to generate an output within a range based on a power supply voltage, the signal generation circuit including: a first voltage generating portion configured to generate an internal midpoint potential based on the power supply voltage; a second voltage generating portion configured to generate a starting voltage of the generated signal based on the power supply voltage and the amplification circuit; a resistance circuit configured to output a voltage caused to attenuate or pass through on the basis of the internal midpoint potential; a controlling portion configured to change a resistance value of the resistance circuit; and an output circuit configured to output the output voltage of the resistance circuit as the generated signal.