Signal Generation Circuit for DC-DC Converter Startup Current Control
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Solution Overview
Problem
In DC-DC converters, the initial operation of LC low pass filters accumulates excessive current in inductors, potentially damaging the converter due to short clock signal periods, leading to fatal damage.
Innovation Solution
A signal generation circuit that adjusts the frequency of the clock signal during initial operation to reduce current accumulation, utilizing a counter, clock signal generator, and frequency changing circuit to generate pulse width modulation signals with varying frequencies and duty cycles, thereby controlling the inductor current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the clock signal period is short (high frequency), then the conversion speed and productivity are improved, but excessive current accumulates in the inductor during initial operation, causing damage
Solution Approach 1:
The clock signal frequency is made dynamic rather than fixed. During initial operation, the frequency is reduced (longer period) to prevent excessive current accumulation in the inductor. After the initial period, the frequency returns to its normal high value for optimal conversion speed. This dynamic adjustment resolves the contradiction between productivity and reliability.
Solution Approach 2:
The system performs a preliminary operation at reduced frequency before normal operation begins. This preliminary action allows the LC low pass filter to stabilize without subjecting the inductor to excessive current stress, preventing damage before the high-frequency conversion process starts.
2Reliability
If the clock signal period is extended (low frequency) during initial operation, then current accumulation in the inductor is reduced, but the conversion speed and productivity decrease
Solution Approach 1:
The system dynamically adjusts the clock signal frequency based on the operational phase. During initial operation, frequency is reduced to ensure safety; during normal operation, frequency increases to maximize productivity. This temporal differentiation resolves the contradiction between reliability and productivity.
Solution Approach 2:
The system employs periodic action with two distinct phases: an initial low-frequency period for safe startup and current prevention, followed by a high-frequency period for optimal conversion performance. This periodic structure allows the system to satisfy both reliability and productivity requirements at different times.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The circuit effectively reduces current accumulation in the inductor during initial operation, preventing damage and ensuring stable converter performance.
Implementation Method 1
A frequency changing circuit configured to generate the clock signal and a sawtooth-wave signal, which have the changed frequency, based on the charging current
Implementation Method 2
a comparator configured to compare a reference signal with the sawtooth-wave signal and to output the clock signal
Implementation Method 3
A switching converter or a DC-DC converter converts a pulse signal into a direct current (DC) voltage using an LC low pass filter
Data Source
AI summary
A signal generation circuit includes: a clock signal generator configured to generate a clock signal and to change a frequency of the clock signal in response to a select signal; a transmission control circuit configured to control transmission of the clock signal based on the select signal; and a counter configured to perform an operation among a count operation and a count stop operation based on an output signal of the transmission control circuit and to output the select signal based on a result of performing the operation. When the counter performs the count operation in response to the clock signal output from the transmission control circuit, the counter outputs a most significant bit (MSB) among its count bits as the select signal.