Adjustable-Threshold Signal Generator for Tunable Multiphase Clocks
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Solution Overview
Problem
Existing signal generation techniques for communication systems, particularly in ultra-wideband applications, are complex and power-intensive due to the need for synchronization and tracking of signals with adjustable frequency and phase, making them unsuitable for low-complexity, low-power, and cost-effective solutions.
Innovation Solution
A signal generator employing a low-frequency oscillator and a low-complexity synchronization and tracking circuit that adjusts the frequency and phase of output signals by comparing an oscillating signal with an adjustable threshold, using a comparator or transistor circuit, and dynamically reconfiguring reactive circuits to achieve tunable multiphase clocks and phase synchronization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional PLL or DLL circuits are used for signal synchronization and tracking, then signal tracking performance is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent changes the operating parameters by using a low-frequency oscillator (e.g., 100 kHz) instead of high-frequency oscillators (e.g., 2.4 GHz), and employs duty-cycle modulation (e.g., 1% duty cycle) to achieve signal tracking. This parameter change enables synchronization without requiring complex PLL/DLL circuits, thereby reducing device complexity while maintaining tracking performance.
Solution Approach 2:
The patent extracts and removes the high-frequency PLL/DLL synchronization circuitry from the system, replacing it with a simplified duty-cycle modulation approach. By taking out the complex synchronization subsystem and replacing it with basic timing control, the patent achieves signal tracking with significantly reduced circuit complexity and power consumption.
2Measurement precision
If high-frequency oscillators and PLL/DLL circuits are employed for precise frequency and phase control, then signal synchronization accuracy is improved, but power consumption increases
Solution Approach 1:
The patent changes the frequency parameter from high-frequency (GHz range) to low-frequency (e.g., 100 kHz) operation, and uses duty-cycle modulation to achieve precise timing control. This parameter transformation maintains the ability to synchronize signals while dramatically reducing power consumption, as low-frequency operation requires significantly less energy than high-frequency operation.
Solution Approach 2:
The patent employs periodic duty-cycle modulation of the low-frequency oscillator output to achieve signal synchronization. By modulating the duty cycle of periodic pulses (e.g., 1% duty cycle at 100 kHz), the system achieves precise timing control equivalent to high-frequency operation but with much lower power consumption due to the low operating frequency.
3Use of energy by moving object
If narrow pulse widths are used in ultra-wideband communication, then power requirements are reduced, but synchronization and tracking complexity increases
Solution Approach 1:
The patent changes the synchronization approach by using duty-cycle modulation of a low-frequency oscillator instead of narrow pulse synchronization. By controlling the duty cycle parameter of periodic pulses at low frequency, the system achieves precise timing synchronization without requiring complex tracking circuits, thereby maintaining low power requirements while reducing synchronization complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution results in a less complex, lower power consumption, and lower cost device capable of generating adjustable phase and frequency signals, suitable for ultra-wideband applications, with improved signal tracking and synchronization performance.
Implementation Method 1
generates an adjustable phase output signal based on comparison of an oscillating signal with an adjustable threshold
Implementation Method 2
the adjustable threshold comprises an adjustable bias signal for a transistor circuit where the oscillating signal is provided as an input to the transistor circuit
Data Source
AI summary
Phase of an output signal is based on comparison of an oscillating signal with an adjustable threshold. Here, adjustment of the threshold results in a corresponding adjustment of the phase of the output signal. For example, the adjustable threshold may comprise an adjustable bias signal for a transistor circuit whereby the oscillating signal is provided as an input to the transistor circuit and the output of the transistor circuit provides the output signal. In some aspects these phase adjustment techniques may be employed to provide one or more tunable multiphase clocks.