Signal Processing Hardware Memory Protection With Outlier Filtering
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional safety protocols for signal processing sub-systems in electrical and electronic systems, such as those used in automobiles, incur high costs and silicon area due to full memory protection, and fail to effectively filter out corrupted data, leading to potential errors in navigation and decision-making processes.
Innovation Solution
Implementing a hybrid memory protection system where critical data is stored in protected memory and non-critical data in unprotected memory, combined with an outlier filter to adjust corrupted pixel values, and an interface protection protocol using redundant bits to detect hardware errors, thereby reducing costs and improving data quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If full memory protection is implemented for all data in signal processing sub-systems, then reliability is improved, but cost and silicon area increase significantly
Solution Approach 1:
The patent applies local quality by differentiating between critical and non-critical data, providing enhanced protection only for critical data stored in protected memory while using simpler protection or no protection for non-critical data in unprotected memory. This selective approach reduces overall silicon area while maintaining reliability for essential functions.
Solution Approach 2:
The memory system is segmented into protected memory for critical data and unprotected memory for non-critical data. This segmentation allows the system to allocate protection resources efficiently, protecting only the portions of data that require high reliability, thereby reducing total silicon area compared to uniform full-protection approaches.
2Device complexity
If conventional safety protocols are used without data filtering, then device complexity is reduced, but measurement precision deteriorates due to corrupted data affecting navigation and decision-making
Solution Approach 1:
The outlier filter implements feedback by continuously monitoring processed data, identifying corrupted values through statistical analysis, and correcting or flagging them before they affect navigation decisions. This feedback mechanism maintains measurement precision without requiring complex hardware changes.
Solution Approach 2:
The outlier filter acts as an intermediary component between the protected/unprotected memory systems and the final decision-making processes. It processes data from both memory types, identifies outliers, and provides cleaned data to navigation systems, thereby maintaining precision without directly modifying the core safety protocol architecture.
3Reliability
If interface protection protocols with redundant bits are implemented, then reliability is improved, but device complexity increases
Solution Approach 1:
The interface protection protocol uses copying by creating redundant bit representations of critical data during transmission between protected and unprotected memory systems. These redundant copies enable error detection through comparison without requiring complex real-time verification mechanisms, thus improving reliability while maintaining relatively simple device architecture.
Data Source
AI summary
Systems and articles of manufacture provide an efficient safety mechanism for signal processing hardware. An example system includes a hardware accelerators, including a first hardware accelerator, and a second hardware accelerator coupled to the first hardware accelerator. Each of the first and second hardware accelerators includes a protected memory and an unprotected memory, and at least one of the hardware accelerators has an outlier filter. The system also includes a memory coupled to the hardware accelerators; and interface protectors, including a first interface protector coupled between the first hardware accelerator and the memory; a second interface protector coupled between the first hardware accelerator, the memory, and the second hardware accelerator; and a third interface protector coupled between the second hardware accelerator and the memory.