Signal Pattern Recognition Using Min-Max Trees

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Solution Overview

Problem

Existing signal pattern recognition methods face challenges in efficiently analyzing complex trigger conditions, leading to dead times and increased computational effort, especially when dealing with high data rates and temporally extended signal amplitude corridors.

Innovation Solution

A method involving discrete-time sampling, block division, and the construction of min-max trees for parallel data processing, allowing for the generation of envelope curves and parallel evaluation of trigger conditions across multiple computing units, thereby reducing computational effort and enabling seamless signal evaluation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If complex trigger conditions are analyzed using existing signal pattern recognition methods, then measurement precision is improved, but dead times occur and productivity decreases

Engineering Contradiction:
Improvesignal pattern recognition accuracyVSAvoidsignal evaluation throughput
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The signal data stream is divided into multiple blocks, with each block processed independently by dedicated processing elements. This segmentation allows parallel evaluation of complex trigger conditions across multiple blocks simultaneously, eliminating dead times while maintaining measurement precision through systematic correlation analysis of each block against the template signal.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The template signal is pre-processed and stored in a ready-to-use format before actual signal evaluation begins. Correlation templates are pre-calculated and stored in memory, allowing processing elements to immediately compare incoming signal blocks against the template without computation delays, thus improving productivity while maintaining accurate pattern recognition.

Inventive Principle:
Principle #10Preliminary action

2Speed

If high data rates are processed using existing methods, then speed of data acquisition is improved, but computational effort increases leading to dead times

Engineering Contradiction:
Improvedata acquisition rateVSAvoidcomputational processing requirement
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The high data rate signal stream is segmented into multiple parallel blocks, each handled by dedicated processing elements. This distributes the computational effort across multiple units working simultaneously, allowing high data acquisition rates to be maintained without overwhelming a single processor and causing dead times.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent replaces complex sequential computational processing with a parallel hardware architecture where multiple processing elements operate simultaneously. This substitution of mechanical/computational sequential operations with parallel hardware processing reduces computational bottlenecks while maintaining high data rate processing capability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Productivity

If seamless signal evaluation without dead times is achieved, then productivity is improved, but device complexity increases due to redundant acquisition and processing means

Engineering Contradiction:
Improvecontinuous signal evaluation capabilityVSAvoidnumber of processing channels
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The processing system is segmented into multiple independent processing elements that each handle specific data blocks. This segmentation enables continuous evaluation across multiple channels without requiring redundant complete acquisition systems, as each element is a simplified processing unit working in parallel on its assigned block.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple processing elements are merged into a unified parallel processing architecture where results from all elements are combined to achieve seamless signal evaluation. This merging allows continuous productivity improvement by utilizing all processing elements simultaneously while sharing common resources like memory and control logic, reducing overall device complexity compared to fully redundant systems.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250013720A1Method and device for signal pattern recognition
Publication Date: 2025.01.09 H NEXT GMBH
  • US20250013720A1 patent drawing
  • US20250013720A1 patent drawing
  • US20250013720A1 patent drawing

AI summary

A method is for triggering, for signal pattern recognition on the basis of the maintenance or violation of signal amplitude corridors, proceeding from a continuous data stream which is sampled in a time-discrete manner and is divided into blocks which are each formed from a number of sampling values given as a power of two (2n). On each of these blocks, a tree structure of minimum and maximum pairs is built. Each of these pairs is a node of the tree and includes the minimum value and the maximum value of the two directly assigned pairs or values in the next level down. Corridors of a mask which is used for signal pattern recognition are shifted from sampling value to sampling value via the data blocks. The trees are built up, like the depth-first searches, by parallel data processing.