Multi-Layer Signal Pin Arrangement for Compact Power Modules
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Solution Overview
Problem
Conventional power modules for electric vehicle inverters face challenges in space utilization and signal interference due to the arrangement of signal pins in a single layer, which limits the reduction of chip size and increases the footprint, and magnetic coupling between power and signal loops.
Innovation Solution
The power module design features signal pins arranged in two parallel layers, with power terminals in one layer and signal pins distributed between the layers to minimize spacings and prevent magnetic coupling, allowing for a more compact footprint and reduced interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If signal pins are arranged in a single layer with power terminals, then the module structure is simple and ease of manufacture is improved, but the footprint area increases and magnetic coupling between power and signal loops occurs
Solution Approach 1:
The patent transitions from a single-layer planar arrangement to a multi-layer three-dimensional configuration. Signal pins are distributed across multiple layers, allowing vertical stacking that reduces the horizontal footprint while maintaining electrical connectivity and reducing magnetic coupling between power and signal paths.
2Ease of manufacture
If signal pins are arranged in a single layer with power terminals, then the manufacturing process is simplified, but magnetic coupling between power and signal loops increases causing signal interference
Solution Approach 1:
By distributing signal pins across multiple layers, the patent creates spatial separation between power loops and signal loops in the vertical dimension. This three-dimensional arrangement reduces magnetic coupling and electromagnetic interference while still allowing for manufacturable construction through standardized multi-layer PCB or substrate techniques.
3Area of stationary object
If the module footprint is reduced by compacting pin arrangement, then space utilization is improved, but signal pin spacing may become insufficient leading to increased signal interference
Solution Approach 1:
The multi-layer configuration allows signal pins to be positioned in different vertical planes, enabling compact horizontal spacing while maintaining adequate electrical and magnetic isolation through vertical separation. This resolves the conflict between compact footprint and sufficient spacing by utilizing the third dimension.
4Ease of manufacture
If power terminals and signal pins are arranged in the same layer, then manufacturing is easier, but the required spacing increases the module footprint
Solution Approach 1:
The patent segments the terminal arrangements into distinct layers: power terminals in one layer and signal pins in other layers. This segmentation allows each type of terminal to be optimized independently for its function while reducing the overall footprint, as vertical stacking replaces horizontal spreading.
Solution Approach 2:
By separating power terminals and signal pins into different vertical layers, the patent eliminates the need for large horizontal spacing while maintaining ease of manufacture through standardized multi-layer construction methods.
Data Source
AI summary
A power module provides one or more power transistors and support elements in a card shape. The pins/terminals for signal-level input/outputs (e.g., gate drive, current sensor, and temperature sensor signals) are arranged in two parallel layers. The power terminals (e.g., positive and negative bus, and output junction of a phase leg) are preferably arranged in just one of the layers. The signal pins are spaced both laterally across a long edge of the power module and transversely to the edge direction, so that the minimum spacings (i.e., clearances) can be achieved while shortening the lateral length of the edge(s) of the power module. Preferably, the signal pins belonging to an individual power transistor (e.g., an IGBT or MOSFET) are distributed between the two layers so that corresponding signal loops can be magnetically decoupled from the power terminal loop.