Signal Processing Apparatus with Independent Second Processor
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing signal-processing apparatuses struggle to achieve high-performance and high-efficiency image processing for MPEG-4 AVC, particularly due to increased processing demands with smaller sub-macro-block sizes and motion detection requirements, leading to inefficient use of processors and high processing loads.
Innovation Solution
A signal-processing apparatus comprising an instruction-parallel processor, a data-parallel processor, and dedicated hardware, where the instruction-parallel processor handles non-routine audio and image compression/decompression, the data-parallel processor performs routine image processing, and dedicated hardware handles heavy tasks like motion detection and de-blocking filtering, with separate buses for instruction and data transfer to optimize processing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single processor is used to handle all compression/decompression tasks, then device complexity is reduced, but processing speed and efficiency deteriorate due to increasing processing demands
Solution Approach 1:
The processor is divided into multiple independent processing units (first processor, second processor, third processor) that can operate simultaneously. Each unit handles specific tasks: the first processor manages overall control and non-routine operations, the second processor handles data processing, and the third processor dedicated to motion detection. This segmentation enables parallel processing, significantly improving processing speed while maintaining manageable device complexity through modular architecture.
Solution Approach 2:
The patent introduces a hierarchical control dimension by implementing a control unit that manages multiple processing units. This adds a new organizational layer to the processor architecture, allowing complex tasks to be distributed across multiple units while maintaining unified coordination. The control unit receives instructions and distributes them appropriately, enabling the system to handle high-complexity MPEG-4 AVC processing without requiring a single overly complex processor.
2Productivity
If dedicated hardware is used for motion detection, then processing capability is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent implements a dedicated third processor specifically for motion detection tasks. This local specialization allows the system to concentrate processing power where needed for motion detection while keeping other processing units focused on their respective tasks. The dedicated processor can be optimized for motion detection algorithms, improving capability without requiring all processing units to be high-power consumption types.
Solution Approach 2:
The control unit dynamically assigns tasks to appropriate processing units based on the operation mode. When motion detection is required, the third processor is activated; when it is not needed, the system can operate with fewer active units, reducing overall power consumption. This dynamic task allocation allows the system to balance processing capability with power consumption based on actual operational requirements.
3Productivity
If the first processor controls all operations sequentially, then device complexity is reduced, but processing efficiency deteriorates due to waiting for instructions
Solution Approach 1:
The control unit prepares and queues instructions in advance for distribution to processing units. Rather than waiting for each processing unit to complete its current task before issuing the next instruction, the control unit can pre-load and organize instruction sequences, allowing processing units to work continuously without idle waiting time. This preliminary preparation of instructions significantly improves processing efficiency.
Solution Approach 2:
The control unit acts as an intermediary between the instruction source and the multiple processing units. It receives high-level instructions, translates them into appropriate commands for specific processing units, and manages the distribution of tasks. This intermediary role enables efficient coordination without requiring direct complex interactions between all processing units, maintaining manageable device complexity while improving overall processing efficiency through optimized instruction flow.
Data Source
AI summary
A signal-processing apparatus includes an instruction-parallel processor, a first data-parallel processor, a second data-parallel processor, and a motion detection unit, a de-blocking filtering unit and a variable-length coding/decoding unit which are dedicated hardware. With this structure, during signal processing of an image compression and decompression algorithm needing a large amount of processing, the load is distributed between software and hardware, so that the signal-processing apparatus can realize high processing capability and flexibility.