Signal Processing Device Digital CDS Counter Area Reduction

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Solution Overview

Problem

Existing methods for A/D conversion in image sensors face challenges with digital correlated double sampling (CDS) being difficult to implement, leading to incomplete noise removal and increased costs due to the need for multiple counter blocks and hybrid counters with binary and gray code systems.

Innovation Solution

A signal processing device that measures the length of a signal period multiple times, retains values, and sets an initial value based on retained measurements to perform A/D conversion using binary or gray codes, allowing for digital CDS within a reduced counter area, thereby reducing costs and noise components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If digital CDS is implemented using multiple counter blocks for A/D conversion, then noise removal capability is improved, but device complexity and cost increase

Engineering Contradiction:
Improvenoise removal capabilityVSAvoidcounter area
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple counter blocks into a single shared counter by implementing a column-parallel A/D conversion circuit where one counter serves multiple pixel columns. The counter is controlled to perform counting operations for different columns at different times, eliminating the need for separate counters for each column while maintaining the digital CDS noise removal capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The counter is designed to perform multiple functions: it can count for different pixel columns sequentially, serve as both a gray code counter and a binary ripple counter through reconfiguration, and enable digital CDS operations. This multi-functionality reduces the overall number of components needed in the system.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If hybrid counters using both binary and gray codes are employed, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
ImproveA/D conversion accuracyVSAvoidcounter structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The counter structure is made dynamic and reconfigurable, allowing it to switch between gray code counting mode and binary counting mode based on the operational requirements. The counter can be configured as a gray code counter for certain phases of operation and as a binary ripple counter for other phases, eliminating the need for fixed hybrid counter structures.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The counting mode parameter of the counter is changed based on operational needs. The counter can operate in gray code mode for initial counting and switch to binary mode for subsequent operations, allowing the system to achieve high measurement precision without requiring a complex fixed hybrid counter design.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If multiple slope reference signals with different inclinations are used, then A/D conversion speed is improved, but device complexity increases

Engineering Contradiction:
ImproveA/D conversion speedVSAvoidreference signal generation
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system uses periodic switching between different slope reference signals instead of having all signals active simultaneously. The selector switches between first and second slope reference signals in a periodic manner based on the pixel signal level, allowing the system to achieve high-speed A/D conversion across different signal ranges without requiring complex simultaneous signal generation.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS10567685B2Signal processing device and method, imaging element, and electronic device
Publication Date: 2020.02.18 SONY SEMICON SOLUTIONS CORP
  • US10567685B2 patent drawing
  • US10567685B2 patent drawing
  • US10567685B2 patent drawing

AI summary

The present technology relates to signal processing device and method, an imaging element, and an electronic device capable of reducing a rise of costs. A signal processing device according to the present technology includes a measurement unit that performs measurement of a length of a period from an input start of a signal to a change of a value of the signal a plurality of times, retains measured values obtained by the measurement performed the plurality of times, sets an initial value of the measurement on the basis of any one of a plurality of the retained measured values, and performs the measurement by using the initial value. The present technology is applicable to an electronic circuit such as a flip-flop circuit and an A/D conversion unit, an imaging element such as a CMOS image sensor, and an electronic device such as a digital still camera, for example.