Signal Processing Apparatus Pin Reduction via Time Division Multiplexing
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Solution Overview
Problem
Existing signal processing systems for diversity configurations face challenges in reducing the number of pins required for signal transmission between LSIs, leading to increased costs and reduced versatility due to phase clock synchronization issues and redundant structures.
Innovation Solution
Implementing a signal processing apparatus that classifies signals based on update period, update timing, and tolerable transmission delay, and performs time division multiplexing to minimize the number of pins needed for transmission, allowing signals to be transmitted with a minimum number of pins while ensuring reliable clock synchronization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple LSIs are provided to process signals from multiple antennas for diversity, then signal reception quality and reliability are improved, but the number of transmission pins increases which raises cost
Solution Approach 1:
The patent combines multiple signal transmission functions into a single transmission pin by implementing time-division multiplexing. The classification unit categorizes signals into different groups based on their transmission requirements, and the time-division multiplexing unit transmits these grouped signals sequentially over the same pin, thereby reducing the total number of pins needed while maintaining reliable signal transmission between LSIs for diversity reception
Solution Approach 2:
The patent segments signals into different groups based on their update periods and transmission characteristics. By classifying signals with similar timing requirements together and transmitting them in dedicated time slots, the system efficiently utilizes a reduced number of pins while ensuring each signal group receives appropriate transmission resources for maintaining reception quality
2Reliability
If multiple LSIs are provided for diversity configuration, then communication reliability is improved, but clock phase synchronization becomes difficult to maintain
Solution Approach 1:
The patent introduces a clock signal transmission mechanism where one LSI acts as a master and others as slaves. The master LSI generates a reference clock signal that is transmitted to slave LSIs through the same communication infrastructure. This intermediary clock signal enables all LSIs to synchronize their operations, eliminating phase synchronization issues while maintaining communication reliability across the diversity configuration
3Ease of manufacture
If a single LSI is used for diversity, then cost is reduced and versatility is improved, but the LSI cannot be used in both diversity and non-diversity configurations
Solution Approach 1:
The patent designs the LSI with universal functionality that accommodates both diversity and non-diversity configurations. The classification unit and time-division multiplexing unit are configured to handle multiple signal groups, allowing the same LSI to operate in diversity mode (processing signals from multiple antennas) or non-diversity mode (processing a single antenna signal). This multi-functional design enables cost reduction through standardized LSI usage while maintaining configuration flexibility
Data Source
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AI summary
The present technology relates to a signal processing apparatus, a signal processing method, and a program capable of reducing the number of pins for transmitting and receiving data. The signal processing apparatus is provided with a signal transmission unit configured to perform classification for a signal to be transmitted and received between processing units that process an obtained signal, perform time division multiplexing for the signal classified into a group, and transmit the signal. The classification is performed depending on at least one feature of an update period, an update timing, and a tolerable transmission delay of the signal. Further, the signal belonging to the group is subjected to time division multiplexing in such a manner that the transmission is completed within the update period, the transmission is completed within a range of the tolerable delay, and the transmission is performed with a minimum number of pins. The present technology can be applied to a reception apparatus that receives and processes airwaves.