Signal Quantizer Circuit for Low-Latency 12-Bit Sensing

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Solution Overview

Problem

Existing oversampled analog-to-digital converters require a large number of samples to achieve high-resolution estimates, leading to significant latency and increased power consumption, which is undesirable for low-power sensor applications.

Innovation Solution

A signal quantizer with a summing junction, loop filter, and reconstruction filter utilizing regenerative gains to reduce the number of clock cycles required for high-resolution quantization, achieving 12-bit resolution in approximately 22 clock cycles while maintaining low power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If a higher modulator order is used to reduce latency, then the number of clock cycles required decreases, but stability problems arise due to feedback in the modulator

Engineering Contradiction:
ImprovelatencyVSAvoidstability
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The patent divides the high-order modulator into multiple cascaded lower-order modulators (first modulator and second modulator). This segmentation allows each individual modulator to operate at a stable low order while collectively achieving the resolution benefits of a higher-order system, thus resolving the stability issue without sacrificing latency performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a single-dimensional high-order modulator design to a multi-dimensional cascaded structure. By distributing the modulation function across multiple stages operating in sequence, the system achieves high-order resolution effects through dimensional expansion rather than increasing the order of a single modulator, thereby maintaining stability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Loss of time

If more integrators are added to the loop filter to reduce clock cycles, then the resolution estimate improves, but the system complexity and die area increase

Engineering Contradiction:
Improveclock cyclesVSAvoidsystem complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent segments the filtering and modulation functions across multiple simple stages rather than using a single complex high-order loop filter. Each modulator stage uses minimal integrators, keeping individual stage complexity low while achieving cumulative high-resolution performance through the cascade arrangement.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent combines multiple low-order modulators in a cascaded configuration where the output of one feeds into the next. This merging of simple functional blocks achieves the equivalent performance of a complex high-order modulator with fewer integrators per stage, reducing overall device complexity and die area.

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If a higher modulator order is used to achieve better resolution, then the measurement precision improves, but the power consumption increases

Engineering Contradiction:
ImproveresolutionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent segments the high-resolution conversion task across multiple low-power modulator stages. Each stage operates with minimal power consumption due to its low order and simple structure, but the cumulative effect of cascading these stages achieves high measurement precision equivalent to a single high-power high-order modulator.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each modulator stage in the cascade independently performs its portion of the resolution achievement, with the feedback from subsequent stages serving the earlier stages. This distributed self-service approach allows each component to operate efficiently at low power while collectively delivering high precision.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8970412B2Signal quantization method and apparatus and sensor based thereon
Publication Date: 2015.03.03 INVENSENSE INC
  • US8970412B2 patent drawing
  • US8970412B2 patent drawing
  • US8970412B2 patent drawing

AI summary

A signal quantizer includes a summing junction, a loop filter, a quantizer and a reconstruction filter. The summing junction is responsive to an input signal and to a modulated signal and is operative to combine the modulated signal and the input signal to generate a summing junction output. The loop filter is responsive to the summing junction output and is operative to generate a loop filter output and has a first regenerative gain associated therewith. The quantizer is responsive to the loop filter output and is operative to generate the modulated signal. The reconstruction filter is responsive to the modulated signal and is operative to generate a quantized output signal and has a second regenerative gain associated therewith that is substantially equal to that of the loop filter.