Differential Signal Receiver for High Common-Mode LVDS Inputs

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional signal receivers for low voltage differential signals (LVDS) face challenges in processing input signals with higher common-mode voltages, leading to signal distortion and increased power consumption due to the need for larger circuit sizes and level shift circuits.

Innovation Solution

A signal receiver design featuring transistors with high voltage endurance operating in common drain configuration, coupled with a load circuit that adjusts common-mode voltage and an amplifying circuit generating output signals between power and ground voltages, allowing for efficient processing of differential signals with wide common-mode voltage ranges.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the power voltage is reduced to save power consumption, then power consumption is reduced, but signal distortion occurs when input signals have higher common-mode voltage

Engineering Contradiction:
Improvepower consumptionVSAvoidsignal processing quality
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent changes the voltage parameter characteristics by using transistors with high voltage endurance that can tolerate input common-mode voltages higher than the power voltage. This allows the signal receiver to process LVDS signals with common-mode voltages up to 1.8V while operating with lower power voltages, eliminating signal distortion without requiring additional level shift circuits.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a level shift circuit is added to adjust common-mode voltage, then signal distortion is prevented, but circuit size increases

Engineering Contradiction:
Improvesignal processing qualityVSAvoidcircuit size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts and eliminates the unnecessary level shift circuit from the signal receiver by using transistors with high voltage endurance. These transistors can directly handle input signals with common-mode voltages higher than the power voltage, removing the need for separate voltage adjustment circuits and reducing overall circuit size.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The transistors with high voltage endurance serve multiple functions: they act as both the signal processing elements and the voltage tolerance elements. This multi-functionality eliminates the need for separate level shift circuits, reducing circuit complexity and size while maintaining signal processing quality.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If a level shift circuit is added to adjust common-mode voltage, then signal distortion is prevented, but power consumption increases

Engineering Contradiction:
Improvesignal processing qualityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent removes the power-consuming level shift circuit by using transistors with high voltage endurance that can directly process signals with higher common-mode voltages. This extraction eliminates the additional power consumption that would be required to operate separate voltage adjustment circuits.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS12009949B2Signal receiver
Publication Date: 2024.06.11 NOVATEK MICROELECTRONICS CORP
  • US12009949B2 patent drawing
  • US12009949B2 patent drawing
  • US12009949B2 patent drawing

AI summary

A signal receiver includes a first transistor, a second transistor, a load circuit, an amplifying circuit and a load circuit. The first transistor has a first end receiving a power voltage, and a control end receive a first input signal. The second transistor has a first end receiving the power voltage, and a control end receiving a second input signal, wherein the first input signal and the second input signal are differential signals and transit between a first voltage and a reference ground voltage, the first voltage is larger than the power voltage. The load circuit is coupled to the first transistor and the second transistor. The amplifying circuit generates an output signal according a first signal on the second end of the first transistor and a second signal on the second end of the second transistor.