Signal Segmentation With Dual CRC Polynomials for Undetected Errors

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Solution Overview

Problem

The existing cyclic redundancy check (CRC) methods fail to detect errors effectively in signal blocks of shorter lengths, which are segmented from longer signal blocks, leading to undetected error patterns in both the short and long signal blocks due to the use of the same CRC generating polynomial and reading patterns.

Innovation Solution

The method involves generating and attaching different CRCs to signal blocks of varying lengths using distinct CRC generating polynomial equations, and applying different reading patterns to reduce undetected error probabilities by utilizing reciprocal polynomial relationships and interleaving techniques.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the same CRC generating polynomial is used for both long and short signal blocks, then the implementation is simple, but undetected error patterns occur in both block types

Engineering Contradiction:
Improveimplementation simplicityVSAvoiderror detection capability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies different CRC generating polynomials to different signal block types (long blocks vs. short blocks). Specifically, a first CRC polynomial is used for long signal blocks and a second CRC polynomial is used for short signal blocks. This local differentiation ensures that error patterns undetected by one polynomial may be detected by the other, thereby improving overall error detection capability while maintaining implementation simplicity through the use of predetermined polynomials.

Inventive Principle:
Principle #3Local quality

2Productivity

If signal blocks are segmented into shorter lengths, then transmission efficiency is improved, but undetected error probability increases due to CRC limitations on short blocks

Engineering Contradiction:
Improvetransmission efficiencyVSAvoiderror detection capability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the parameter of CRC generating polynomial based on signal block length. By selecting different polynomials (first polynomial for long blocks, second polynomial for short blocks), the system maintains effective error detection across different block lengths. This parameter adaptation allows short blocks to achieve comparable error detection performance to long blocks, thereby enabling efficient segmentation without sacrificing reliability.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If different CRC polynomials are used for long and short signal blocks, then undetected error patterns are reduced, but device complexity increases

Engineering Contradiction:
Improveerror detection capabilityVSAvoidCRC implementation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs predetermined CRC generating polynomials that are established in advance for different signal block types. The first CRC polynomial and second CRC polynomial are predefined and stored, eliminating the need for complex real-time polynomial selection or generation. This preliminary preparation maintains implementation simplicity while achieving improved error detection through polynomial differentiation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8745469B2Signal segmentation method and CRC attachment method for reducing undetected error
Publication Date: 2014.06.03 LG ELECTRONICS INC
  • US8745469B2 patent drawing
  • US8745469B2 patent drawing
  • US8745469B2 patent drawing

AI summary

The present invention provides for applying a cyclic redundancy check (CRC) to a data signal. The present invention includes attaching a first CRC to a first data signal block having a first length, segmenting the first data signal block attached with the first CRC into a plurality of second data signal blocks having a length shorter than the first length, respectively generating a second CRC for each second data signal block, and attaching the generated second CRC to the respective second data signal block. Moreover, the first CRC and second CRC may be generated from respectively different CRC generating polynomial equations.