Signal Switching Detection Without Clock-Induced Sensitivity Loss
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Solution Overview
Problem
Existing signal processing devices in wireless communication systems face challenges in accurately detecting desired radio waves due to false detections caused by signals turning on and off more frequently or for longer durations than desired, and the introduction of clock signals can lower sensitivity.
Innovation Solution
A signal processing device that includes a detecting part, a timer with a time constant circuit, and a determination circuit that counts the number of signal switching events within a measured time period, eliminating the need for a clock signal and reducing false detection probabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If integration circuit time constant is decreased to reduce false detection of long-duration signals, then false detection of long-duration signals is reduced, but detection sensitivity and signal holding capability are degraded
Solution Approach 1:
The patent segments the signal detection process into multiple independent evaluation dimensions: intensity detection (via diode detector), duration detection (via timer comparing signal end time with transmission end time), and frequency detection (via counter counting signal transitions). Each segment operates with optimized parameters independently, avoiding the trade-off present in single-integration-circuit approaches. The timer uses a fixed time constant for accurate duration measurement while the counter handles frequency analysis, allowing each component to be optimized for its specific function without compromising overall detection sensitivity or reducing false detections.
2Productivity
If clock signal is supplied to logic circuit for signal analysis, then signal frequency and duration analysis is enabled, but clock signal sneaks to detection circuit and lowers sensitivity
Solution Approach 1:
The patent extracts the timing and counting functions from the clock-synchronized logic circuit domain and places them in the analog timer/counter domain. The timer circuit measures signal duration using RC time constants independent of clock signals, and the counter circuit counts signal transitions using trigger inputs rather than clock synchronization. This extraction eliminates the clock signal path that was causing sensitivity degradation while preserving the analytical capabilities needed for frequency and duration detection.
Solution Approach 2:
The patent introduces intermediary circuits between the detection circuit and the analysis logic: the diode detector serves as an intermediary converting RF signals to baseband, the timer circuit acts as an intermediary measuring duration without clock dependency, and the counter circuit serves as an intermediary counting transitions. These intermediaries buffer and condition signals appropriately, allowing analysis functions to be performed without direct clock signal injection into the sensitive detection circuitry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces the likelihood of false detections by accurately differentiating between desired and undesired signals without the interference of clock signals, enhancing the sensitivity and accuracy of signal detection.
Implementation Method 1
a timer that includes a time constant circuit and measures time based on a time constant of the time constant circuit
Data Source
AI summary
A signal processing device includes a detecting part that detects intensity of an input signal, a timer part that includes a time constant circuit and measures time based on a time constant of the time constant circuit, and a determination circuit that counts the number of times of switching of the input signal detected by the detecting part within the time measured by the time constant circuit.