Low-Latency Signaling-Link Retimer for PCIe
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Solution Overview
Problem
High-latency issues in signaling systems due to substantial queuing of symbol streams in retimers, which impede reliable communication over long distances, especially in high-speed PCIe communication systems, where operational latency is predominantly additive and affects bit error rates.
Innovation Solution
A low-latency retimer system that dynamically switches between a high-latency content modification queue and a low-latency bypass path, aligning latency to ensure coherent block transmission, thereby reducing retimer transit latency by excising unneeded symbols and advancing the trailing stream portion, and synchronizing descrambler resynchronization to maintain protocol integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If symbol streams are substantially queued in retimers to ensure reliable communication, then communication reliability is improved, but retimer transit latency increases significantly
Solution Approach 1:
The retimer dynamically adjusts its operational latency by switching between a high-latency content modification queue path and a low-latency bypass path based on real-time conditions. This dynamic adaptation allows the system to optimize the trade-off between reliability and latency rather than being fixed at one operating point.
Solution Approach 2:
The symbol stream processing is segmented into two separate paths: a content modification queue path that ensures reliability through thorough processing, and a bypass path that minimizes latency. This segmentation allows the system to selectively use the appropriate path based on current operational requirements.
2Stability of the object's composition
If a content modification queue is used to modify selected logical blocks, then block encoding coherency can be maintained, but the queue depth increases operational latency
Solution Approach 1:
The system dynamically controls the depth and activation of the content modification queue based on whether content modification is actually required. When no modifications are needed, the queue depth is reduced or bypassed entirely, minimizing operational latency while maintaining the capability to modify blocks when necessary for coherency.
Solution Approach 2:
The content modification capability is applied locally and selectively to specific logical blocks that require modification, rather than processing the entire symbol stream through the modification queue. This selective application maintains block encoding coherency only where needed while reducing overall operational latency.
3Loss of time
If a low-latency bypass path is implemented to reduce transit latency, then retimer transit latency is reduced, but block encoding coherency may be compromised
Solution Approach 1:
The system uses feedback mechanisms to monitor the state of logical blocks and determine when to switch between the bypass path and the content modification queue path. This feedback ensures that the bypass is only activated when it will not compromise block encoding coherency, allowing low-latency operation when safe and coherent modification when necessary.
Solution Approach 2:
The bypass path activation is dynamically controlled based on real-time assessment of block encoding requirements. The system can transition between bypass and queue paths as conditions change, maintaining coherency when needed while achieving low latency when possible.
Data Source
AI summary
A signaling-link retimer concatenates discontiguous leading and trailing portions of a precoded and scrambled symbol stream, shunting the trailing portion of the stream ahead of unneeded stream content to dynamically reduce the number of symbols queued between retimer input and output and thus reduce retimer transit latency.