Signature Analysis Microcontroller Error Detection
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Solution Overview
Problem
Conventional error correction and detection methods are inadequate for modern bus structures in safety-relevant systems, leading to inaccurate error probability estimation and limited diagnostic coverage of computation faults in processing units and internal subsystems.
Innovation Solution
A microcontroller system that generates and compares trace signals to produce signatures for error detection, using a signature analysis unit and port logic to generate error signals and disable devices in case of mismatches, while also employing an address regeneration unit for validation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional error correction and detection capabilities are added to bus structures, then error detection capability is improved, but device complexity and manufacturing difficulty increase due to the need for additional communication lines and redundancy
Solution Approach 1:
The patent extracts the error detection function from the physical bus structure and implements it through software-based signature analysis. Instead of adding hardware redundancy lines, the system uses existing communication channels to transmit signatures that are analyzed by processing units, thereby separating the detection function from the physical infrastructure.
Solution Approach 2:
The patent replaces the mechanical/hardware-based error correction approach (additional communication lines, physical redundancy) with a software-based signature analysis system. The error detection is achieved through computational algorithms that analyze signatures of data and addresses, substituting physical redundancy with informational redundancy.
2Reliability
If time multiplexing of diverse algorithms is used for fail-safe operation, then diagnostic coverage is improved, but failure reaction time increases due to the time required to compute multiple diverse algorithms
Solution Approach 1:
The patent applies partial action by using a single algorithm with signature analysis instead of requiring multiple diverse algorithms to be fully executed. The signature analysis provides sufficient diagnostic coverage by analyzing key characteristics of data and addresses, without needing to compute complete diverse algorithm results, thus reducing the time penalty.
Solution Approach 2:
The system performs preliminary signature generation and analysis during normal operation rather than waiting for failure detection. Signatures are continuously generated and compared, enabling faster failure reaction by having diagnostic data prepared in advance rather than requiring full algorithm computation after a failure is detected.
3Reliability
If dual processing of a single algorithm is used with independent channels, then common cause failures are minimized, but device complexity increases due to requirements for independent processing channels and protected data
Solution Approach 1:
The patent segments the error detection function into separate signature generation and analysis components that can be distributed across processing units. This allows the system to achieve failure independence through functional segmentation rather than requiring fully independent processing channels, reducing the complexity overhead while maintaining reliability.
4Reliability
If conventional error correction is applied to address decoders and address buses, then error protection is improved, but manufacturing precision requirements increase due to the need for proven quality software and independent processing channels
Solution Approach 1:
The patent implements self-service error protection where the signature analysis system monitors and detects errors in address decoders and buses without requiring external verification or proven-quality software processes. The system uses informational redundancy through signatures to provide self-diagnostic capabilities, reducing dependence on manufacturing precision and software quality assurance processes.
Data Source
AI summary
A system and method for processing data for use with a microcontroller having a processing unit provides for sending an input data address to a memory as part of a read request for input data stored in the memory, receiving the input data from the memory, generating a plurality of trace signals, generating a first plurality of signatures based upon the plurality of trace signals, receiving a second plurality of corresponding signatures from a second microcontroller, comparing each signature of the first plurality of signatures to each corresponding signature of the second plurality of corresponding signatures, generating a first error signal if the comparison produces at least one mismatch, and utilizing the first error signal to generate one or more disable signals for disabling operation of one or more devices under control of the microcontroller.