Signed Multiword Multiplier Circuit Using Biased Representation
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Solution Overview
Problem
Existing hardware multiplication circuits are inefficient due to the need for both signed and unsigned multipliers, leading to increased power consumption and manufacturing costs, especially when oversized for certain applications.
Innovation Solution
A special-purpose hardware circuit that uses only signed multipliers to process signed multiword inputs, representing inputs as shifted signed numbers to reduce the need for unsigned mode operations and minimize hardware components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If both signed and unsigned multipliers are included in the hardware circuit, then the circuit can handle both signed and unsigned multiplication operations, but the circuit area and manufacturing cost increase substantially
Solution Approach 1:
The patent changes the numerical representation parameters by using a biased representation system where unsigned integers are represented as positive signed integers and signed integers are represented with a bias offset. This parameter change allows a single signed multiplier to handle both signed and unsigned multiplication operations, eliminating the need for separate unsigned multiplier hardware and thereby reducing circuit die area.
2Adaptability or versatility
If both signed and unsigned multipliers are included in the hardware circuit, then the circuit can handle both signed and unsigned multiplication operations, but the manufacturing cost increases
Solution Approach 1:
By changing the numerical representation parameters to use biased representation, the patent enables a single signed multiplier to perform both signed and unsigned multiplication. This reduces the total number of multiplier components required, directly lowering manufacturing costs while maintaining full operational versatility.
Solution Approach 2:
The signed multiplier is designed to be universal by accepting biased representations of both signed and unsigned integers. The same hardware circuit performs multiple functions (signed multiplication and unsigned multiplication) by interpreting inputs according to the biased representation scheme, thereby reducing component count and manufacturing complexity.
3Adaptability or versatility
If oversized multiplication circuits are used, then the circuit can handle various computing applications, but power consumption increases
Solution Approach 1:
The patent applies parameter changes by using biased numerical representation to enable a single signed multiplier to handle diverse computing applications including neural network computations. This reduces the overall circuit size and component count, thereby decreasing power consumption while maintaining broad computational versatility.
Solution Approach 2:
The signed multiplier achieves multi-functionality by processing both signed and unsigned operations through biased representation. This universal design eliminates the need for oversized circuits with dedicated signed and unsigned multiplier units, reducing power consumption across all computing applications.
Data Source
AI summary
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for a hardware circuit configured as a signed multiword multiplier. The circuit includes a processing circuit that receives inputs that each have a respective bit-width. The processing circuit can represent at least one input as a signed multiword input based on the first input having a bit-width that exceeds a fixed bit-width of the hardware circuit. The circuit includes signed multipliers that are each configured to multiply signed inputs. Each signed multiplier includes multiplication circuitry configured to: receive the signed multiword input; receive a signed second input; and generate a signed output in response to multiplying the signed multiword input with the signed second input.