Silent Code Mapping for Parallel Data Switching Noise

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Solution Overview

Problem

High-speed computing systems face noise issues due to simultaneous switching of integrated circuits, which can lead to power supply and ground noise, affecting data transmission integrity and increasing power consumption.

Innovation Solution

The system employs algorithms to map data words from one code space to another, ensuring an even or nearly even number of logical zeros and ones, reducing the number of bit transitions and thereby minimizing noise generated by simultaneous switching outputs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If data is transmitted using parallel interfaces with multiple bits simultaneously, then communication speed is improved, but noise from simultaneous switching increases

Engineering Contradiction:
Improvecommunication speedVSAvoidswitching noise
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The patent changes the parameter of data encoding by mapping N-bit data words to M-bit coded words where M > N. This parameter change ensures that the coded words have an even or nearly even number of logical zeros and ones, which reduces simultaneous switching noise while maintaining communication speed through parallel interfaces.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies preliminary encoding action to data words before transmission. By pre-mapping the data words to coded words with balanced logic levels, the system prepares the data in advance to minimize switching noise during actual transmission, resolving the contradiction between speed and noise.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If data is encoded to provide sufficient transitions between logic states for clock and data recovery, then reliability is improved, but power consumption increases

Engineering Contradiction:
Improveclock and data recovery reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent changes the encoding parameters to achieve a balance between transitions and power consumption. By mapping to coded words with even or nearly even logic levels, the system maintains sufficient transitions for reliable clock and data recovery while reducing excessive switching activity that would increase power consumption.

Inventive Principle:
Principle #35Parameter changes

3Object-generated harmful factors

If data is encoded to include an even or nearly even number of logical zeros and ones, then noise is reduced, but device complexity increases

Engineering Contradiction:
Improveswitching noiseVSAvoidencoding complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent uses preliminary mapping tables to store the relationships between N-bit data words and M-bit coded words. This preliminary preparation simplifies the encoding process during transmission, reducing the complexity of the encoding device while maintaining the noise reduction benefits of balanced logic level distribution.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates a mapping table that copies and stores the optimal encoding relationships in advance. This allows the encoding device to simply look up and retrieve pre-determined coded words rather than performing complex real-time encoding calculations, thereby reducing device complexity.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS10944421B2Efficient silent code assignment to a set of logical codes
Publication Date: 2021.03.09 ORACLE INT CORP
  • US10944421B2 patent drawing
  • US10944421B2 patent drawing
  • US10944421B2 patent drawing

AI summary

The least-significant-bits (LSBs) of a first data word of a first subset of a first plurality of data words may be compared to the LSBs of each data word of a second subset of a second plurality of data words. The first data word may then be mapped to a second data word of the second subset. A number of LSBs of the second data word matching LSBs of the first data word may be greater than a respective number of LSBs of each data word of a third subset of the second subset matching the LSBs of the first data word, where the third subset excludes the second data word and a most-significant-bit (MSB) of the second data word may be the same as a MSB of the first data word.