Silica-Core Packaging Substrate for Reliable Through-Via Alignment

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Solution Overview

Problem

The existing packaging technologies struggle to provide a substrate with excellent electrical reliability and prevent misalignment of the electrically conductive layer pattern during the formation of a redistribution layer.

Innovation Solution

A packaging substrate is developed using a silica-based core with a through via portion and a through electrode having metal grains with preferential growth orientation in the thickness direction of the core, ensuring a high cross-sectional area ratio of the through electrode to the via space.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a through hole is formed in a ceramic substrate and conductive material is applied, then electrical characteristics are improved, but misalignment of the electrically conductive layer pattern occurs during redistribution layer formation

Engineering Contradiction:
Improveelectrical characteristicsVSAvoidalignment precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The invention changes the physical and chemical parameters of the via inner diameter surface by controlling the contact angle to 40° or less, making the surface hydrophilic. This parameter change ensures complete filling of the via space with conductive material during the plating process, preventing voids and ensuring consistent electrical properties while maintaining alignment precision during subsequent redistribution layer formation.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention applies local quality control by specifically treating the via inner diameter surface with different contact angle characteristics compared to the bulk substrate. The via inner diameter surface is engineered to be hydrophilic (contact angle ≤40°) while the rest of the substrate maintains its original properties. This localized treatment ensures proper conductive material filling in the via region without affecting the overall substrate performance or subsequent layer alignment.

Inventive Principle:
Principle #3Local quality

2Reliability

If the via space is completely filled with through electrode, then electrical reliability is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveelectrical reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention simplifies the manufacturing process by controlling the contact angle parameter of the via inner diameter surface to 40° or less. This single parameter control enables complete via filling during the standard plating process without requiring additional complex steps such as multiple plating cycles, selective masking, or specialized filling equipment. The hydrophilic surface naturally guides the conductive material to fill the entire via space uniformly.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution achieves excellent electrical reliability and suppresses misalignment of the redistribution layer, enhancing the stability and performance of the packaging substrate.

Implementation Method 1

The through electrode includes metal grain having a preferential growth orientation in the thickness direction of the silica-based core

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

A contact angle of the surface of the silica-based core for pure water may be 40° or less

Methodology Applied
Scientific EffectWetting: Wetting

Data Source

PatentEP4560684A1Packaging substrate and semiconductor package comprising the same
Publication Date: 2025.05.28 ABSOLICS INC
  • EP4560684A1 patent drawingFigure 1a~2
  • EP4560684A1 patent drawingFigure 3~4
  • EP4560684A1 patent drawingFigure 5a~5b

AI summary

A packaging substrate according to a present disclosure includes a silica-based core. The silica-based core includes a through via portion passing through the silica-based core in a thickness direction of the silica-based core. The through via portion includes a via space which is a space where an electrode is disposed and a via inner diameter surface surrounding the via space. The packaging substrate includes a through electrode disposed in the via space. The through electrode includes metal grain having a preferential orientation in the thickness direction of the silica-based core. In this case, a packaging substrate having excellent electrical reliability, and in which misalignment of an electrically conductive layer pattern is suppressed when a redistribution layer is formed may be provided.