Silicide Layer Backside Contact SOI MOSFET Metal Loss

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Solution Overview

Problem

Semiconductor-on-insulator (SOI) MOSFET devices face challenges such as metal loss and charging effects due to the conventional manufacturing processes, which affect the performance and efficiency of the semiconductor devices.

Innovation Solution

A silicide layer is introduced between the backside contact and the backside interconnect structure, and silicide layers are disposed between the contacts and interconnects to prevent metal loss and discharge accumulated charges, simplifying the manufacturing process and reducing cycle time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional manufacturing process is used for SOI MOSFET devices, then the device structure can be formed, but metal loss occurs in the backside contact and charging effects increase

Engineering Contradiction:
Improvemetal loss preventionVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A silicide layer is introduced as an intermediary between the backside contact and the backside interconnect structure. This silicide layer serves multiple functions: it prevents metal loss from the backside contact and provides a discharge path for accumulated charges, thereby reducing charging effects. The silicide layer acts as a mediator that resolves the conflicts between metal loss prevention and charging effect reduction without requiring fundamental changes to the manufacturing process complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the manufacturing process is simplified to reduce cycle time, then productivity increases, but manufacturing precision may be compromised

Engineering Contradiction:
Improvemanufacturing cycle timeVSAvoidcontact and interconnect alignment
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The silicide layer is formed in advance during the manufacturing process, before the final interconnect structures are completed. This preliminary formation of the silicide layer allows it to be integrated into subsequent processing steps without requiring additional alignment-critical steps. The silicide layer is prepared as part of the contact formation process, which simplifies the overall manufacturing flow while maintaining precision requirements.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If silicide layers are added between contacts and interconnects, then metal loss is prevented and charging effects are reduced, but device structure complexity increases

Engineering Contradiction:
Improvecharging effect reductionVSAvoidlayer structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The silicide layer is designed to perform multiple functions simultaneously: it prevents metal loss from the backside contact, provides a discharge path for accumulated charges to reduce charging effects, and serves as part of the electrical interconnect structure. By making the silicide layer multi-functional, the patent avoids adding separate structures for each function, thereby limiting the increase in overall device complexity while achieving multiple reliability improvements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces metal loss and charging effects, enhancing the performance and commercial competitiveness of semiconductor devices by improving the manufacturing efficiency and reducing the cycle time.

Implementation Method 1

a silicide layer is disposed between a backside contact and a backside interconnect structure, which solves the issue of metal loss of the backside contact

Methodology Applied
Scientific EffectElectrochemical stabilization:

Implementation Method 2

silicide layers are disposed between the contacts and interconnects to prevent metal loss and discharge accumulated charges

Methodology Applied
Scientific EffectCharge discharge: Electrical Accumulator

Data Source

PatentUS11398548B2Semiconductor device
Publication Date: 2022.07.26 UNITED MICROELECTRONICS CORP
  • US11398548B2 patent drawing
  • US11398548B2 patent drawing
  • US11398548B2 patent drawing

AI summary

A semiconductor device and a method for manufacturing the semiconductor device are provided. The semiconductor device includes an insulating layer, a semiconductor layer, a plurality of isolation structures, a transistor, a first contact, a plurality of silicide layers, and a protective layer. The semiconductor layer is disposed on a front side of the insulating layer. The plurality of isolation structures are disposed in the semiconductor layer. The transistor is disposed on the semiconductor layer. The first contact is disposed beside the transistor and passes through one of the plurality of isolation structures and the insulating layer therebelow. The plurality of silicide layers are respectively disposed on a bottom surface of the first contact and disposed on a source, a drain, and a gate of the transistor. The protective layer is disposed between the first contact and the insulating layer.