Metal Silicide Contact Thickness Control for Transistor Series Resistance
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Solution Overview
Problem
Conventional integrated circuit (IC) fabrication results in transistors with different operating parameters, such as switching speed, due to varying series resistance between nested and isolated regions, leading to performance degradation.
Innovation Solution
A method is developed to form metal silicide contacts by depositing a metal layer over a processing layer on a substrate, followed by a salicide process to increase the thickness of the contacts, ensuring consistent series resistance across densely and less densely populated transistor regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional IC fabrication processes are used, then transistors can be formed in nested and isolated regions, but the series resistance differs between nested and isolated transistor regions, leading to different operating parameters
Solution Approach 1:
The patent applies local quality by forming metal silicide contacts selectively in nested transistor regions through a salicide process, while isolated transistor regions receive different treatment. This creates locally optimized contact structures that compensate for the higher series resistance in densely packed nested regions, achieving uniform series resistance across different transistor regions without requiring different fabrication processes for each region type.
2Manufacturing precision
If metal silicide contacts are formed using the salicide process, then the contact thickness increases and series resistance decreases, but the process complexity increases
Solution Approach 1:
The salicide process is self-service in nature, where the metal silicide forms automatically through in-situ reaction between deposited metal and silicon surfaces during thermal processing. The contact thickness is self-limited by the consumption of silicon from the underlying layers, eliminating the need for precise thickness control during deposition and reducing process complexity compared to conventional contact formation methods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method achieves consistent performance parameters for transistors in both nested and isolated regions, reducing the difference in series resistance to less than 5%, thereby improving overall IC performance and switching speed.
Implementation Method 1
The substrate is processed to cause a reaction between the processing and metal layers, thereby increasing the thickness of the metal silicide contact
Implementation Method 2
The substrate is processed to cause a reaction between the processing and metal layers, thereby increasing the thickness of the metal silicide contact
Data Source
AI summary
A processing layer, such as silicon, is formed on a metal silicide contact followed by a metal layer. The silicon and metal layers are annealed to increase the thickness of the metal silicide contact. By selectively increasing the thickness of silicide contacts, Rs of transistors in iso and nested regions can be matched.