Self-Aligned Silicide Contacts for FinFET Drive Current
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Field effect transistor (FET) and FinFET devices face challenges in achieving effective electrical connectivity between silicon source and drain regions and metallic contacts due to limited surface area of silicide portions in proximity to the gate, which impedes transistor drive currents.
Innovation Solution
The solution involves forming silicide portions with both horizontal and vertical surfaces on the source and drain regions, increasing the surface area in contact with metallic materials, and depositing metallic contacts on these silicide regions to enhance electrical connectivity by reducing resistance to drive currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If traditional planar silicide portions are used on source and drain regions, then the manufacturing process is simple, but the surface area for electrical contact with metallic contacts is limited, impeding transistor drive currents
Solution Approach 1:
The patent transitions from traditional planar (2D) silicide portions to three-dimensional silicide structures with vertical surfaces. By forming silicide on the vertical surfaces of the source region that are perpendicular to the substrate, the invention adds a vertical dimension to the contact area, significantly increasing the total surface area available for metallic contact without requiring additional lateral space.
Solution Approach 2:
The silicide portion is segmented into multiple surfaces including a horizontal top surface and one or more vertical surfaces perpendicular to the substrate. This segmentation allows different orientations of silicide surfaces to be formed, each contributing to the total contact area with metallic contacts, thereby resolving the contradiction between simple manufacturing and increased surface area.
2Reliability
If the surface area of silicide portions is increased to improve electrical conduction, then drive current efficiency improves, but the manufacturing precision requirements increase
Solution Approach 1:
The silicide formation process is made self-aligning by utilizing the existing vertical surfaces of the source region. The silicide naturally forms on exposed silicon surfaces including vertical walls, and the metallic contacts subsequently self-align to these silicide regions. This self-service approach reduces the need for additional alignment steps and precision requirements while achieving improved electrical connectivity through increased surface area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The increased surface area of silicide portions improves electrical conduction by reducing the Schottky barrier, thereby increasing drive current efficiency and enhancing the overall performance of FET and FinFET devices.
Implementation Method 1
The increased surface area of silicide portions improves electrical conduction by reducing the Schottky barrier
Implementation Method 2
depositing a metallic contacts on these silicide regions
Data Source
AI summary
A field effect device includes a channel region disposed on a silicon on insulator (SOI) layer, a gate portion disposed on the channel region, a source region disposed on the SOI layer and connected to the channel region having a horizontal surface and a vertical surface, the vertical surface arranged perpendicular to a linear axis of the device, a silicide portion that includes the horizontal surface and vertical surface of the source region, a contact including a metallic material in contact with the horizontal surface and vertical surface of the source region, and a drain region connected to the channel region disposed on the SOI layer.