Silicide Layer Uniformity in Semiconductor Gate Electrodes
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Solution Overview
Problem
As flash memory devices are scaled down, challenges arise in fabricating semiconductor structures due to the need for improved methods to form reliable silicide layers, which are crucial for maintaining device performance and density, particularly in ensuring uniform silicide thickness and preventing open circuits during contact formation.
Innovation Solution
A method involving the formation of a gate electrode layer, a spacer layer, and a silicide layer, where the spacer layer is recessed to expose the gate electrode, allowing a metal material to react with the semiconductor material to form a silicide layer with a central and peripheral portion, enhancing uniformity and thickness at the edges, thus improving the process window for contact formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the minimum size of features is scaled down to increase element density, then element density improves, but manufacturing precision deteriorates due to difficulties in forming uniform silicide layers
Solution Approach 1:
The silicide layer formation process is segmented into multiple stages: first forming a metal material layer, then performing a first anneal to form an initial silicide layer, followed by a second anneal to form a final uniform silicide layer. This multi-stage approach allows better control over silicide thickness and uniformity at scaled dimensions
Solution Approach 2:
A spacer layer is formed around the gate electrode before silicide formation, and a metal material layer is deposited in advance. These preliminary structures guide the subsequent silicide formation process to ensure uniform thickness and proper positioning, preventing open circuits during contact formation
2Device complexity
If conventional silicide formation methods are used, then process simplicity is maintained, but reliability deteriorates due to open circuits during contact formation
Solution Approach 1:
The method performs preliminary actions by forming a spacer layer and metal material layer before silicide formation. These preliminary structures ensure that the silicide layer will have sufficient thickness and uniformity at the edges, preventing open circuits during subsequent contact formation
Solution Approach 2:
The annealing parameters are changed and optimized in two distinct stages with different temperature profiles and durations. This parameter optimization ensures complete reaction between metal and semiconductor materials while maintaining silicide layer uniformity, thereby improving contact formation reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method ensures a more uniform silicide layer formation, increasing the reliability and manufacturing yield of semiconductor devices by providing a thicker peripheral silicide region, which enhances the process window for contact plug formation and reduces the risk of open circuits.
Implementation Method 1
reacting a semiconductor material of the gate electrode layer with the metal material using an anneal process to form a silicide layer
Implementation Method 2
reacting a semiconductor material of the gate electrode layer with the metal material using an anneal process to form a silicide layer
Data Source
AI summary
A method for forming a semiconductor structure includes forming a gate electrode layer over a semiconductor substrate, forming a first spacer layer to cover a sidewall of the gate electrode layer, recessing the first spacer layer to expose an upper portion of the sidewall of the gate electrode layer, forming a metal material to cover an upper surface and the upper portion of the sidewall of the gate electrode layer; reacting a semiconductor material of the gate electrode layer with the metal material using an anneal process to form a silicide layer, and removing the metal material after the anneal process.