Silicide Formation with Pre-Amorphous Implant
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Solution Overview
Problem
Conventional silicide formation processes in MOS devices face issues such as increased leakage currents due to nickel silicide encroachment in NMOS devices and non-uniform silicide regions with significant thickness variation in PMOS devices, particularly in deep-submicron scaling, leading to performance degradation.
Innovation Solution
A method involving pre-amorphized implantation of non-siliciding ions into silicon-containing compound stressors like SiGe or SiC, followed by metal layer deposition and annealing to form silicide regions, which helps in reducing parasitic resistance and improving uniformity of silicide formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional salicide process is used to form metal silicide, then contact resistance is reduced, but leakage current increases due to nickel silicide encroachment under spacers
Solution Approach 1:
The patent applies preliminary amorphization of the source/drain region surface before metal deposition. This pre-treatment modifies the surface structure to control subsequent silicide formation, preventing nickel silicide from encroaching under spacers while still achieving low contact resistance through controlled reaction.
Solution Approach 2:
The patent creates different surface conditions in different regions: the source/drain regions are amorphized to control silicide formation and prevent encroachment, while other regions maintain their original structure. This localized modification achieves selective silicide formation that reduces leakage current.
2Reliability
If conventional salicide process is used on SiGe source/drain regions, then silicide regions are formed, but thickness variation increases due to non-uniform SiGe formation
Solution Approach 1:
The patent applies preliminary amorphization to the SiGe source/drain regions before metal deposition. This pre-treatment creates a uniform amorphous surface that eliminates the non-uniformity inherent in as-grown SiGe structures, enabling uniform silicide thickness formation during subsequent annealing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces contact resistance and enhances the uniformity of silicide regions, thereby improving the performance of MOS devices by minimizing leakage currents and thickness variations.
Implementation Method 1
implanting non-siliciding ions into the silicon-containing compound stressor to amorphize an upper portion of the silicon-containing compound stressor
Implementation Method 2
annealing to react the metal layer with the silicon-containing compound stressor to form a silicide region
Data Source
AI summary
A method for forming a semiconductor structure includes providing a semiconductor substrate, forming a gate stack on the semiconductor substrate, forming a silicon-containing compound stressor adjacent the gate stack, implanting non-siliciding ions into the silicon-containing compound stressor to amorphize an upper portion of the silicon-containing compound stressor, forming a metal layer on the silicon-containing compound stressor while the upper portion of the SiGe stressor is amorphous, and annealing to react the metal layer with the silicon-containing compound stressor to form a silicide region. The silicon-containing compound stressor includes SiGe or SiC.