Silicide String Selection Line for Low-Resistance 3D Memory
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Solution Overview
Problem
Three-dimensional memory devices face challenges in achieving low power and high speed operation due to the high resistance of poly-crystalline silicon string selection lines, which are formed through additional processes and limit the performance of these devices.
Innovation Solution
The implementation of a string selection line gate electrode with a silicide layer, where the lower string selection line gate electrode is made of N-doped poly-crystalline silicon and the upper string selection line gate electrode is formed using silicide, reducing electrical resistance and preventing electrical bridging between adjacent components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a string selection line is formed through additional processes using poly-crystalline silicon, then the three-dimensional memory device can be manufactured, but the resistance is much higher than that of metals, making it difficult to achieve low power and high speed operation
Solution Approach 1:
The patent changes the material parameter of the string selection line gate electrode from poly-crystalline silicon to silicide, which has fundamentally different electrical properties. This material substitution reduces resistance by several orders of magnitude, enabling low power and high speed operation while maintaining the structural integrity and functionality of the memory device
Solution Approach 2:
The patent employs a composite structure where the string selection line gate electrode is formed as a distinct layer with silicide material, differentiating it from the poly-crystalline silicon channel structures. This composite approach allows optimization of each component's material properties for its specific function, achieving both low resistance in the gate electrode and appropriate semiconductor characteristics in the channel
2Reliability
If a string selection line is formed through additional processes using poly-crystalline silicon, then the three-dimensional memory device can be manufactured, but the high resistance limits the speed of operation
Solution Approach 1:
The patent changes the material parameter of the string selection line gate electrode from poly-crystalline silicon to silicide, which has fundamentally different electrical properties. This material substitution reduces resistance by several orders of magnitude, enabling low power and high speed operation while maintaining the structural integrity and functionality of the memory device
Solution Approach 2:
The patent applies different material qualities to different parts of the device: silicide is used specifically for the string selection line gate electrode where low resistance is critical for speed, while poly-crystalline silicon is used for the channel structures where semiconductor properties are essential. This localized material optimization achieves high speed operation without compromising operational reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the performance of three-dimensional memory devices by lowering resistance and maintaining reliability, enabling high performance and preventing electrical bridging between components.
Implementation Method 1
the upper string selection line gate electrode may include silicide
Implementation Method 2
The lower string selection line gate electrode may include N-doped poly-crystalline silicon
Data Source
AI summary
A three-dimensional memory device is provided. The three-dimensional memory device may include a substrate, a cell stack, a string selection line gate electrode, a lower vertical channel structure, an upper vertical channel structure, and a bit line. The string selection line gate electrode may include a lower string selection line gate electrode and an upper string selection line gate electrode formed on an upper surface of the lower string selection line gate electrode. The lower string selection line gate electrode may include N-doped poly-crystalline silicon. The upper string selection line gate electrode may include silicide.