Silicon-Added Metal Oxide Memory for Low-Power Cross-Point Integration
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving high integration, low power consumption, and improved data storage characteristics while maintaining simplicity in fabrication processes, especially in memory circuits used in electronic devices.
Innovation Solution
The development of an electronic device with a semiconductor memory unit that includes silicon-added metal oxide layers as variable resistors, alternated with metal oxide and silicon oxide layers, which are integrated in a cross-point structure to enhance resistance switching characteristics and reduce operational current and voltage, thereby simplifying the fabrication process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional fabrication processes are used for semiconductor memory devices, then manufacturing precision can be maintained, but device complexity increases and integration density decreases
Solution Approach 1:
The memory device is segmented into distinct functional layers: variable resistor layer, first insulating layer, and second insulating layer. This segmentation allows each layer to be optimized independently while simplifying the overall fabrication process by enabling sequential formation of each component with standard processes
Solution Approach 2:
The first lines and second lines serve multiple functions: they act as both word lines and bit lines, and also function as electrodes for the variable resistor and as structural support. This multi-functionality reduces the number of separate components needed, thereby simplifying the fabrication process while increasing integration density
2Quantity of substance
If higher integration is achieved in semiconductor memory devices, then data storage capacity increases, but fabrication process complexity increases
Solution Approach 1:
The memory device transitions from planar integration to three-dimensional stacking with the variable resistor layer positioned between the first and second insulating layers. This vertical arrangement enables higher integration density without complicating the fabrication process, as each layer can be formed using standard deposition and patterning techniques applied in sequence
Solution Approach 2:
The memory device employs composite material structures: the variable resistor layer combines metal and oxide components, while the insulating layers provide electrical isolation. These composite structures achieve high integration density through material properties rather than increased geometric complexity, maintaining ease of manufacture
3Use of energy by moving object
If operational current and voltage are reduced in memory devices, then power consumption decreases, but data storage characteristics deteriorate
Solution Approach 1:
The variable resistor layer's resistance is dynamically changed by controlling oxygen vacancy distribution through applied voltage. By adjusting the concentration and distribution of oxygen vacancies, the device achieves low operational voltage and current while maintaining reliable data storage characteristics through controlled resistance switching between high and low states
Solution Approach 2:
The variable resistor layer contains oxygen vacancies that create conductive filaments or pathways. These vacancy-induced pathways enable low-resistance conduction at reduced voltages and currents, allowing the device to maintain data storage reliability while significantly reducing power consumption compared to conventional resistive switching mechanisms
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in improved data storage characteristics, increased integration, and reduced operational requirements, such as lower operation current and voltage, while also simplifying the fabrication process by patterning variable resistors simultaneously with the lines, thus reducing mask processes and preventing disturbances between memory cells.
Implementation Method 1
The silicon-added metal oxide layer is a variable resistor that switches between different resistance states based on how oxygen vacancy inside the silicon-added metal oxide layer moves
Implementation Method 2
the metal oxide layer and the silicon oxide layer are insulators
Data Source
AI summary
An electronic device includes a semiconductor memory unit. The semiconductor memory unit includes first lines extending along a first direction; second lines extending along a second direction that intersects with the first direction; a silicon-added metal oxide layer disposed in each intersection region of the first lines and the second lines; a metal oxide layer that is disposed alternately with the silicon-added metal oxide layer in the first direction and that is disposed in a region between two adjacent second lines and over a corresponding one of the first lines over which the silicon-added metal oxide layer is disposed; and a silicon oxide layer that is disposed alternately with the silicon-added metal oxide layer in the second direction and that is disposed in a region between two first lines and under a corresponding one of the second lines under which the silicon-added metal oxide layer is disposed.