Tensile-Stressed Silicon Arsenic Layer for High Mobility MOS Devices
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Solution Overview
Problem
Existing methods for creating tensile-stressed silicon layers in semiconductor devices require additional processing steps and materials, such as carbon doping, which can reduce carrier mobility and increase complexity.
Innovation Solution
A method of forming a tensile-stressed silicon arsenic layer using high concentrations of arsenic doping, eliminating the need for carbon dopants by epitaxially growing the silicon arsenic layer using chemical vapor deposition techniques, thereby achieving desired tensile stress without additional processing requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stress or pressure
If carbon doping is used to create tensile stress in silicon layer, then tensile stress is achieved, but carrier mobility is reduced and processing complexity increases
Solution Approach 1:
The patent changes the dopant material parameter from carbon to arsenic, and adjusts the doping concentration to achieve tensile stress without the harmful effects of carbon doping on carrier mobility
Solution Approach 2:
The patent converts the typically harmful effect of heavy doping (which usually degrades mobility) into a beneficial outcome by using arsenic specifically to induce tensile stress while maintaining or enhancing carrier mobility through the stress effect
2Stress or pressure
If carbon doping is used to create tensile stress in silicon layer, then tensile stress is achieved, but additional processing steps and materials are required
Solution Approach 1:
The patent extracts the carbon doping step from the processing sequence by using arsenic doping instead, which can be achieved through standard epitaxial growth processes already present in the fabrication flow
Solution Approach 2:
The arsenic doping process serves multiple functions: it provides the necessary tensile stress, acts as a standard semiconductor doping process, and can be integrated into existing epitaxial growth equipment without requiring specialized carbon doping apparatus
3Stress or pressure
If additional dopants are added to compensate for reduced carrier mobility, then tensile stress is maintained, but processing complexity and material requirements increase
Solution Approach 1:
The patent removes the need for multiple dopants by using arsenic alone to provide both the tensile stress and the necessary electrical properties, eliminating the requirement for additional compensating dopants
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances carrier mobility and device performance by providing sufficient tensile stress in silicon layers, reducing the need for additional dopants and processing steps, and can be used in MOS devices and finFETs.
Implementation Method 1
a concentration of arsenic in the silicon arsenic layer is greater than 5E+20 arsenic atoms per cubic centimeter
Implementation Method 2
the crystal lattice becomes tensile stressed
Implementation Method 3
epitaxially growing the silicon arsenic layer using chemical vapor deposition techniques
Implementation Method 4
chemical vapor deposition techniques
Data Source
AI summary
Structures including a tensile-stressed silicon arsenic layer, devices including the structures, and methods of forming the devices and structures are disclosed. Exemplary tensile-stressed silicon arsenic layer have an arsenic doping level of greater than 5 E+20 arsenic atoms per cubic centimeter. The structures can be used to form metal oxide semiconductor devices.