Silicon-Boron Mask Deposition for Low Surface Roughness
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Solution Overview
Problem
As semiconductor device sizes shrink, surface roughness of masking materials affects subsequent etching uniformity, leading to challenges in producing high-quality devices and structures.
Innovation Solution
The method involves delivering silicon-containing and boron-containing precursors with a hydrogen-containing precursor in a semiconductor processing chamber, forming a plasma with controlled power density and temperature, and performing a thermal anneal to deposit a silicon-and-boron material with reduced surface roughness, typically less than 2 nm.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional deposition methods are used to form masking materials, then device fabrication can proceed, but surface roughness increases as device sizes shrink, affecting etching uniformity
Solution Approach 1:
The patent changes multiple deposition parameters simultaneously: uses plasma-enhanced chemical vapor deposition (PECVD) instead of conventional CVD, maintains substrate temperature between 200-400°C, controls precursor flow rates (silane 50-200 sccm, diborane 10-50 sccm, hydrogen 100-500 sccm), and operates at pressure 1-10 Torr. These parameter changes collectively reduce surface roughness to less than 2 nm while maintaining etching uniformity.
Solution Approach 2:
The patent deposits a composite silicon-boron material (silicon diboride or silicon-boron alloy) rather than pure silicon. The boron addition (0.1-10 at%) modifies the material properties to achieve smoother surfaces and improved etching characteristics, creating a composite masking layer that outperforms conventional single-material masks.
2Productivity
If device sizes continue to shrink to increase integration density, then productivity improves, but surface roughness effects become more pronounced, worsening manufacturing precision
Solution Approach 1:
The patent employs PECVD with controlled parameters (substrate temperature 200-400°C, pressure 1-10 Torr, specific precursor ratios) to achieve atomic-level surface smoothness. This enables continued device scaling to higher integration densities while maintaining the manufacturing precision required for small feature sizes, as the smooth surface eliminates roughness-related variability in subsequent processing.
3Productivity
If plasma power density is increased to improve deposition rate, then productivity increases, but surface roughness may increase, worsening manufacturing precision
Solution Approach 1:
The patent optimizes plasma power density to a specific range (50-500 W) rather than using maximum power. This moderate plasma power, combined with hydrogen gas flow (100-500 sccm) and controlled substrate temperature (200-400°C), achieves a balance between deposition rate and surface smoothness, maintaining roughness below 2 nm while providing practical deposition speeds.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach produces films with significantly reduced surface roughness, improving mask material quality and facilitating more uniform processing operations, thereby enhancing the fabrication of semiconductor devices.
Implementation Method 1
forming a plasma of all precursors within the processing region of a semiconductor processing chamber. depositing a silicon-and-boron material on a substrate disposed within the processing region
Implementation Method 2
performing a thermal anneal of the silicon-and-boron material
Data Source
AI summary
Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the silicon-containing precursor and the boron-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the silicon-containing precursor or the boron-containing precursor is greater than or about 1:1. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber.