Phosphorous-Doped Silicon Buffer Layer for Epitaxy Auto-Doping
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Solution Overview
Problem
Auto-doping, particularly Arsenic (As) auto-doping, during epitaxial growth of Silicon layers on high doping substrates leads to increased dopant concentration at the wafer edge, reducing breakthrough voltage and causing on-wafer inhomogeneity in semiconductor devices.
Innovation Solution
Incorporation of a high doped Phosphorous-doped Silicon buffer layer between the substrate and epitaxy layers to suppress As diffusion, using a thickness of about 1µm to 5µm, which mitigates dopant concentration gradients and maintains uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high doped substrate layer is used to reduce resistivity, then electrical conductivity is improved, but dopant concentration increases in the epitaxial layer leading to reduced breakthrough voltage
Solution Approach 1:
A buffer layer is introduced as an intermediary between the high doped substrate and the low doped epitaxial layer. This buffer layer acts as a mediator that prevents direct diffusion of dopant ions from the substrate to the epitaxial layer, thereby maintaining both the electrical conductivity benefits of the high doped substrate and the high breakdown voltage characteristics of the low doped epitaxial layer.
Solution Approach 2:
The device structure is segmented into three distinct layers: the substrate layer, the buffer layer, and the epitaxial layer. This segmentation allows each layer to independently fulfill its specific function - the substrate provides mechanical support and initial electrical conductivity, the buffer controls dopant diffusion, and the epitaxial layer provides high breakdown voltage - thereby resolving the contradiction between conductivity and breakdown voltage.
2Manufacturing precision
If thermal treatment is applied during epitaxial growth, then crystal structure quality is improved, but As ions out-diffuse from substrate leading to on-wafer inhomogeneity
Solution Approach 1:
The buffer layer serves as a protective intermediary during thermal treatment and epitaxial growth processes. It allows necessary thermal energy to be applied for crystal structure development while simultaneously blocking the out-diffusion pathway for As ions, thus maintaining dopant concentration uniformity across the wafer surface.
Solution Approach 2:
The buffer layer is prepared in advance before the epitaxial growth process begins. This preliminary action creates a protective barrier that prevents the harmful out-diffusion of As ions during subsequent thermal treatments, ensuring uniform dopant distribution from the outset of the growth process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The Phosphorous-doped buffer layer effectively reduces dopant concentration gradients, stabilizing wafer yield and maintaining consistent breakthrough voltage across the wafer, enhancing the performance of high voltage semiconductor devices.
Implementation Method 1
the ions will out-diffuse from the substrate 101 and be re-deposited in the epitaxial layer(s) 103
Implementation Method 2
one or more buffer layers directly in between the one or more substrate layers and the one or more epitaxy layers
Implementation Method 3
Epitaxy involves the deposition of a crystalline layer on top of a crystalline substrate, where the deposited atoms align with the atoms of the substrate to create a single crystal structure
Implementation Method 4
The Phosphorous-doped buffer layer effectively reduces dopant concentration gradients
Data Source
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AI summary
A semiconductor device is proposed comprising one or more substrate layers, one or more epitaxy layers positioned above the one or more substrate layers, and a buffer layer directly in between the one or more substrate layers and the one or more epitaxy layers. The substrate layer may be a high doped Arsenic layer. The epitaxy layer may be low doped. The buffer layer may be a highly Phosphorous-doped Silicon layer. The buffer layer may be relatively thin, about 1 µm to 5µm. Moreover, a method of manufacturing such semiconductor device is proposed.