Silicon Capacitor Porous Region Control Using Boundary Grooves
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Solution Overview
Problem
Existing methods for manufacturing capacitors on silicon substrates often result in the formation of porous parts extending into non-capacitance generation regions, leading to uneven dielectric layer thickness and reduced capacitor performance.
Innovation Solution
A method involving a groove forming step, masking layer forming step, porous part forming step, dielectric layer forming step, and conductor layer forming step, where a groove is created at the boundary between capacitance and non-capacitance generation regions to block the electric field during anodic oxidation, preventing porous part formation in the non-capacitance region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a porous part is formed by anodic oxidation process in the capacitance generation region, then the capacitor can be manufactured with fine pores for dielectric layer formation, but the corner of the porous part may extend into the non-capacitance generation region causing uneven dielectric layer thickness
Solution Approach 1:
A groove is formed at the boundary between the capacitance generation region and the non-capacitance generation region before the anodic oxidation process. This preliminary groove structure serves as a physical barrier that prevents the porous part from extending into the non-capacitance generation region during subsequent anodic oxidation, thereby ensuring uniform dielectric layer thickness without requiring complex masking or control during the oxidation process itself
2Productivity
If the porous part is allowed to form freely during anodic oxidation, then the manufacturing process is simple and fast, but the porous part extends into the non-capacitance generation region reducing capacitor performance
Solution Approach 1:
The silicon substrate surface is segmented into distinct capacitance generation region and non-capacitance generation region by introducing a groove structure. This segmentation physically separates the two regions, allowing the porous part to form freely in the capacitance generation region during anodic oxidation while being blocked from extending into the non-capacitance generation region, thus maintaining both manufacturing efficiency and capacitor performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses the formation of porous parts in non-capacitance regions, ensuring a uniform dielectric layer thickness and improved capacitor performance by concentrating the electric field within the capacitance generation region.
Implementation Method 1
forming a porous part in the capacitance generation region of the silicon substrate by an anodic oxidation process
Data Source
AI summary
A method for manufacturing a capacitor includes a groove forming, a masking layer forming, a porous part forming, a dielectric layer forming, and a conductor layer forming. A silicon substrate having a first surface and a second surface and including a capacitance generation region and a non-capacitance generation region is prepared, and a groove recessed from the first surface toward the second surface is formed at a boundary between the capacitance generation region and the non-capacitance generation region. A masking layer including a first masking part and a second masking part is formed on the first surface of the silicon substrate. A porous part having fine pores is formed in the capacitance generation region of the silicon substrate by an anodic oxidation process. A dielectric layer is formed on inner surfaces of the fine pores. A conductor layer including a first conductive part and a second conductive part is formed.