Silicon Carbide Die Selection Using Crystal Defect Mapping
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Solution Overview
Problem
Conventional silicon carbide semiconductor device manufacturing methods incorrectly classify semiconductor chips with minor crystal defects as non-conforming, leading to reduced conforming product rates and increased costs.
Innovation Solution
A method that identifies semiconductor chips free of specific crystal defects as conforming product candidates, and also considers chips with certain types of extended defects as conforming products based on predetermined standards, allowing for a more nuanced evaluation and increased conforming product rate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all semiconductor chips containing any crystal defect are classified as non-conforming products, then the reliability of the semiconductor device is ensured, but the conforming product rate decreases and manufacturing cost increases
Solution Approach 1:
The patent segments crystal defects into multiple categories based on their impact on device performance: (1) defects that definitely make chips non-conforming, (2) defects that may or may not affect conformity depending on electrical characteristics, and (3) defects that do not affect conformity. This segmentation allows differentiated evaluation rather than blanket rejection of all defective chips.
Solution Approach 2:
The patent applies different quality standards to different types of defects. Instead of uniform rejection criteria, it implements location-specific and defect-type-specific evaluation, where only certain defects in certain locations automatically disqualify chips, while others require further electrical testing or are acceptable.
2Device complexity
If all semiconductor chips containing any crystal defect are classified as non-conforming products, then the quality control is simplified, but the manufacturing cost increases due to reduced conforming product rate
Solution Approach 1:
The quality control process is segmented into multiple evaluation stages: first based on defect type and location, then based on electrical characteristics for ambiguous cases. This reduces the need for complex testing on all chips while maintaining thorough evaluation where necessary.
Solution Approach 2:
Instead of performing comprehensive electrical characteristic tests on all chips with defects, the patent applies partial testing only to chips with defects in the uncertain category. This reduces overall testing complexity and cost while maintaining adequate quality control.
3Productivity
If semiconductor chips with extended defects are evaluated based on electrical characteristics, then the conforming product rate increases, but the evaluation process becomes more complex
Solution Approach 1:
The evaluation process is segmented into two paths: a fast-track path for chips with clearly acceptable defects (based on defect type and location alone), and a detailed evaluation path for chips requiring electrical characteristic testing. This segmentation increases conforming product rate while controlling evaluation complexity through systematic categorization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the conforming product rate and reduces chip costs by accurately evaluating semiconductor chips with extended defects, which can meet the same standards as defect-free chips, thereby optimizing production efficiency and reducing waste.
Implementation Method 1
a semiconductor wafer in which an epitaxial layer is epitaxially grown on a starting substrate containing silicon carbide
Data Source
AI summary
Types, sizes, and locations of crystal defects of an epitaxial layer of a semiconductor wafer containing silicon carbide are detected. Next, a predetermined device element structure is formed and based on location information of the crystal defects of the semiconductor wafer, semiconductor chips free of crystal defects and semiconductor chips containing only extended defects (Frank dislocations, carrot defects) are identified as conforming product candidates among individual semiconductor chips cut from the semiconductor wafer while semiconductor chips containing foreign particle defects and triangular defects are removed as non-conforming chips. Next, electrical characteristics of all the semiconductor chips that are conforming product candidates are checked. Next, based on a conforming product standard obtained in advance, a standard judgment is performed for all the semiconductor chips that are conforming product candidates, whereby semiconductor chips that are conforming products are identified.