Silicon Cavity Backed Radiator for IC Antennas
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Solution Overview
Problem
Integrated circuit (IC) devices face challenges in efficiently radiating energy due to the high dielectric constant of silicon, leading to excessive loss and improper radiation direction, with existing solutions like lenses, superstrates, and thin metal cavities being impractical or inefficient.
Innovation Solution
A silicon cavity backed radiator structure is created using a silicon-on-insulator (SOI) substrate with etched cavities and metal plating, forming a dielectrically loaded cavity that isolates radiating elements and reduces sensitivity to the environment, while maintaining compatibility with standard IC processing techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a radiating element is integrated into an IC device using standard silicon substrate, then manufacturing compatibility is maintained, but radiation efficiency deteriorates due to high dielectric constant of silicon causing excessive loss
Solution Approach 1:
The silicon substrate is segmented by etching cavities that remove portions of the high-dielectric silicon material beneath and around the radiating element. This segmentation isolates the radiating element from the lossy silicon bulk while maintaining manufacturing compatibility through standard semiconductor processing techniques.
Solution Approach 2:
The harmful silicon material is extracted by etching cavities underneath the radiating element, removing the source of excessive dielectric loss. The cavities are then filled with low-loss dielectric material or left as air cavities, effectively taking out the problematic high-dielectric constant material from the radiation path.
2Device complexity
If conventional antenna structures are used in IC devices, then device complexity is minimized, but radiation direction control deteriorates leading to improper radiation direction
Solution Approach 1:
The radiation control is achieved by modifying the substrate dimension beneath the antenna rather than complicating the antenna geometry itself. By etching cavities in the vertical dimension and filling with different dielectric materials, the invention controls radiation direction without increasing horizontal structural complexity.
3Manufacturing precision
If etch-stop layer is used to prevent cavity penetration, then manufacturing precision is improved, but device complexity increases due to additional insulating layer requirements
Solution Approach 1:
The SOI substrate's built-in insulating layer serves dual purposes: it acts as the etch-stop layer to define cavity depth and simultaneously provides electrical isolation between the silicon layers. The existing insulating layer in the SOI structure is utilized for the etch-stop function, eliminating the need for additional etch-stop layers and avoiding increased device complexity.
4Object-generated harmful factors
If metal plating is applied to cavity surfaces, then electromagnetic field constraint is improved, but manufacturing complexity increases due to additional processing steps
Solution Approach 1:
The metal plating process serves multiple functions simultaneously: it provides electromagnetic shielding to prevent surface wave propagation, acts as a ground plane for the radiating element, and can serve as part of the antenna feed structure. This multi-functionality justifies the additional processing step by delivering multiple benefits from a single fabrication operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively enhances radiation efficiency, constrains electromagnetic fields, prevents surface wave modes, and allows for smaller antenna sizes, while being manufacturable with standard semiconductor processes.
Implementation Method 1
the insulating layer may function as an etch-stop layer
Implementation Method 2
The at least one cavity may be metal-plated
Implementation Method 3
a capacitively-coupled electrical connection being created between a ground of the radiating element and the at least one cavity
Data Source
AI summary
One embodiment is an apparatus comprising a silicon-on-insulator (“SOI”) substrate comprising an insulating layer sandwiched in between a bottom silicon layer and a top silicon layer; a radiating element disposed on a top surface of the SOI substrate; and at least one cavity disposed in the SOI substrate surrounding the radiating element, wherein the at least one cavity extends from a bottom surface of the bottom silicon layer to a bottom surface of the insulating layer.