Silicon Core Package Assembly for High-Density PCB Interconnections
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Solution Overview
Problem
Conventional semiconductor package and PCB assemblies face limitations in achieving high circuit densities and miniaturization due to material structuring resolution and manufacturing costs, particularly with the use of organic package substrates and silicon interposers, which are costly and difficult to fabricate.
Innovation Solution
A semiconductor device assembly featuring a silicon core structure with a passivating thermal oxide layer, a dielectric layer made of epoxy resin with silica particles, and redistribution layers formed on the silicon core, including a copper layer and adhesion layers, to enable efficient interconnections and reduce manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If organic package substrates are used for semiconductor fabrication, then ease of forming features and connections is improved, but material structuring resolution becomes insufficient for high circuit densities
Solution Approach 1:
The patent employs a composite structure combining an organic package substrate with a silicon interposer. The organic substrate provides ease of manufacturing and feature formation, while the silicon interposer provides the necessary high-resolution structuring capability for high-density circuits. This composite approach allows both materials to contribute their strengths to the overall package assembly.
2Productivity
If silicon interposers are used to achieve high circuit densities, then bandwidth density and integration are improved, but manufacturing cost and fabrication difficulty increase
Solution Approach 1:
The patent divides the package structure into separate functional components: the organic package substrate and the silicon interposer. This segmentation allows each component to be optimized and manufactured independently using appropriate processes, then assembled together. The silicon interposer can be fabricated with high-precision processes where needed, while the organic substrate is manufactured using cost-effective standard PCB processes, reducing overall manufacturing cost.
3Quantity of substance
If through-silicon vias are formed in silicon interposers to achieve high-density interconnections, then circuit density is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent uses the organic package substrate as an intermediary layer between the silicon interposer and the final PCB assembly. This intermediary allows for simplified via formation processes in the organic substrate compared to direct through-silicon via fabrication, reducing manufacturing complexity while maintaining high circuit density through the silicon interposer's optimized via structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables the formation of high-density semiconductor packages with improved electrical bandwidth and reduced manufacturing costs, overcoming the limitations of conventional materials and processes by providing a scalable and cost-effective semiconductor core structure.
Implementation Method 1
a passivating layer surrounding the silicon structure and including a thermal oxide
Implementation Method 2
a dielectric layer surrounding the passivating layer and formed of an epoxy resin
Implementation Method 3
a copper layer formed on the copper seed layer
Data Source
AI summary
The present disclosure relates to semiconductor core assemblies and methods of forming the same. The semiconductor core assemblies described herein may be utilized to form semiconductor package assemblies, PCB assemblies, PCB spacer assemblies, chip carrier assemblies, intermediate carrier assemblies (e.g., for graphics cards), and the like. In one embodiment, a silicon substrate core is structured by direct laser patterning. One or more conductive interconnections are formed in the substrate core and one or more redistribution layers are formed on surfaces thereof. The silicon substrate core may thereafter be utilized as a core structure for a semiconductor package, PCB, PCB spacer, chip carrier, intermediate carrier, or the like.