Silicon Single Crystal Pulling Method for Dislocation-Free Low-Resistivity Wafers
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Solution Overview
Problem
The Czochralski method for growing silicon single crystals often generates dislocations and scratches when producing low-resistivity boron-doped silicon wafers, making it difficult to eliminate defects and increasing processing costs and reducing productivity.
Innovation Solution
A method for pulling silicon single crystals with a reduced necking portion diameter of 2 mm or more and a pulling rate of 2 mm/min or less during the necking step, ensuring complete dislocation elimination and preventing scratches on the wafer surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the conventional Dash Necking method is used with a necking portion diameter of 4 mm or less and a growth rate of 1 to 10 mm/min, then the silicon single crystal can be grown with ordinary resistivity, but dislocations are generated in high density and cannot be completely eliminated in low-resistivity crystals
Solution Approach 1:
The patent changes the key parameters of the necking process: reducing the necking portion diameter to 2 mm or less (more aggressive than conventional 4 mm or less) and reducing the growth rate to 0.1 to 1 mm/min (slower than conventional 1 to 10 mm/min). These parameter changes create more severe thermal gradients and slower cooling rates that effectively eliminate dislocations even in low-resistivity crystals with high dopant concentrations.
Solution Approach 2:
The patent performs the necking step as a preliminary action before main crystal growth. By creating a severe necking portion first with the modified parameters (2 mm or less diameter, 0.1 to 1 mm/min growth rate), the crystal structure is prepared to be free of dislocations before the subsequent growth phase, preventing dislocation propagation throughout the entire crystal.
2Reliability
If low-resistivity silicon single crystal with high dopant concentration is grown using conventional methods, then the desired electrical properties are achieved, but the frequency of generating dislocations during growth is higher
Solution Approach 1:
The patent maintains the high dopant concentration (metal boron) in the melt to achieve the desired low resistivity (0.1 Ω·cm or less), but changes the growth parameters during the necking step: using a necking portion diameter of 2 mm or less and a growth rate of 0.1 to 1 mm/min. This allows the crystal to achieve both the desired electrical properties and be free of dislocations.
3Object-generated harmful factors
If the necking portion diameter is reduced to 2 mm or less and growth rate is reduced to 0.1 to 1 mm/min, then dislocations are completely eliminated, but the processing time is increased
Solution Approach 1:
The patent applies excessive action in the necking step by using more severe parameters than conventionally required (2 mm or less diameter, 0.1 to 1 mm/min growth rate). This ensures complete dislocation elimination in a relatively short necking phase, and the benefit of dislocation-free crystal compensates for the extended time by preventing defects that would require costly reprocessing.
4Productivity
If low-resistivity single crystal ingot is processed into wafer without adequate defect detection, then productivity is maintained, but defects such as scratches are generated at wafer surface
Solution Approach 1:
The patent performs preliminary defect prevention by modifying the crystal growth parameters during the necking step. By using a necking portion diameter of 2 mm or less and a growth rate of 0.1 to 1 mm/min, the crystal is grown dislocation-free from the beginning, preventing scratches and surface defects before wafer processing occurs. This eliminates the need for costly defect detection and reprocessing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively eliminates dislocations and prevents scratch defects on the wafer surface, reducing processing costs and improving productivity for low-resistivity boron-doped silicon wafers.
Implementation Method 1
dislocations are generated in the seed crystal in high density as a result of thermal shock at the time that the seed crystal contacts with the silicon melt
Implementation Method 2
a concentration of dopant impurities such as metal boron for doping is high
Data Source
AI summary
The invention is a method for pulling a silicon single crystal, which is a Czochralski method for growing the silicon single crystal by contacting a seed crystal with a melt and by pulling up, including the steps of: contacting the seed crystal with the melt; forming a necking portion under the seed crystal; and forming the silicon single crystal under the necking portion by increasing a diameter, wherein a pulling rate during forming the necking portion is 2 mm/min or less, and the silicon single crystal with the increased diameter is a boron-doped silicon single crystal having a resistivity of 1.5 mΩ·cm or less at a shoulder portion. Therefore, there can be provided a method of pulling a silicon single crystal without generating defects such as scratches at a wafer surface in the case of processing a boron-doped silicon single crystal ingot with a low resistivity produced by CZ method into a wafer.