Self-Limiting Silicon Deposition on III-V Substrates

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Solution Overview

Problem

Current silicon deposition methods, such as ALD and PVD, are inefficient at low temperatures and incompatible with three-dimensional semiconductor devices like finFETs, and fail to provide self-limiting and saturating silicon growth on non-silicon surfaces.

Innovation Solution

Cycling dosing of silane and chlorosilane precursors at temperatures between 50° C. and 300° C. to form a self-limiting silicon monolayer on substrates like InxGa1-xAs, InxGa1-xSb, InxGa1-xN, and SiGe, with Si—H termination for continued growth and passivation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If conventional ALD or PVD methods are used for silicon deposition, then silicon layers can be formed on substrates, but the process requires high temperatures (above 355°C) and is incompatible with three-dimensional semiconductor devices

Engineering Contradiction:
Improvesubstrate temperatureVSAvoidcompatibility with 3D devices
Core Design Contradiction:
TemperatureVSAdaptability or versatility

Solution Approach 1:

The patent changes the temperature parameter from conventional high temperatures (>355°C) to low temperatures (50-300°C) by using a self-limiting cyclic deposition process with silane and chlorosilane precursors, enabling deposition on temperature-sensitive 3D semiconductor devices without requiring high thermal energy

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent segments the continuous deposition process into discrete cyclic steps: dosing silane precursor, purging, dosing chlorosilane precursor, and purging again. Each cycle deposits a controlled amount of silicon, allowing precise thickness control and compatibility with complex 3D device geometries

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If conventional ALD processes are used for monolayer silicon growth, then silicon layers can be deposited, but each cycle takes several minutes and the process is slow

Engineering Contradiction:
Improvemonolayer controlVSAvoiddeposition speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent achieves continuous useful action by using self-limiting surface reactions where each precursor cycle completely saturates the surface sites. The cyclic dosing of silane followed by chlorosilane continuously deposits silicon monolayers without idle time, as each cycle immediately prepares the surface for the next cycle, eliminating waiting periods while maintaining precise monolayer control

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The patent uses periodic cyclic dosing of precursors with optimized timing. Each cycle consists of silane dosing, purging, chlorosilane dosing, and purging, creating a rhythmic deposition process that maintains high productivity while ensuring complete surface coverage and monolayer precision through repeated periodic cycles

Inventive Principle:
Principle #19Periodic action

3Reliability

If PVD deposition of silicon is used for passivation, then silicon can be deposited, but the silicon is not ordered and requires multilayer structures

Engineering Contradiction:
Improvepassivation qualityVSAvoidmultilayer requirement
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs self-service through self-limiting surface reactions where the deposition process automatically terminates when all surface sites are saturated with silicon. The cyclic dosing of silane and chlorosilane precursors naturally stops depositing when the surface is fully covered, creating ordered monolayers without requiring complex multilayer structures or external control mechanisms

Inventive Principle:
Principle #25Self-service

4Temperature

If low temperature deposition is attempted with conventional methods, then temperature requirements are reduced, but the deposition process becomes inefficient and HCl desorption is slow

Engineering Contradiction:
Improvesubstrate temperatureVSAvoiddeposition efficiency
Core Design Contradiction:
TemperatureVSProductivity

Solution Approach 1:

The patent changes the chemical parameters by using silane and chlorosilane precursors with self-limiting surface reactions. This allows low temperature operation (50-300°C) while maintaining high deposition efficiency, as the cyclic dosing mechanism ensures complete surface saturation without requiring high temperature to drive off HCl, unlike conventional continuous processes

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Achieves low-temperature self-limiting and saturating silicon deposition on various substrates, enabling efficient surface preparation and passivation, suitable for semiconductor and metal surfaces, and providing protection against oxidation.

Implementation Method 1

Self-limiting chemical vapor deposition and atomic layer deposition methods

Methodology Applied
Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Implementation Method 2

Self-limiting chemical vapor deposition and atomic layer deposition methods

Methodology Applied
Scientific EffectAtomic Layer Deposition:

Implementation Method 3

cycling dosing of silane and chlorosilane precursors at a temperature between 50° C. and 300° C.

Methodology Applied
Scientific EffectThermolysis: Thermolysis

Data Source

PatentUS9305780B2Self-limiting chemical vapor deposition and atomic layer deposition methods
Publication Date: 2016.04.05 APPLIED MATERIALS INC
  • US9305780B2 patent drawing
  • US9305780B2 patent drawing
  • US9305780B2 patent drawing

AI summary

Methods for depositing silicon on a semiconductor or metallic surface include cycling dosing of silane and chlorosilane precursors at a temperature between 50° C. and 300° C., and continuing cycling between three and twenty three cycles until the deposition self-limits via termination of surface sites with Si—H groups. Methods of layer formation include depositing a chlorosilane onto a substrate to form a first layer, wherein the substrate is selected from the group consisting of InxGa1-xAs, InxGa1-xSb, InxGa1-xN, SiGe, and Ge, wherein X is between 0.1 and 0.99. The methods may include pulsing a silane to form a silicon monolayer and cycling dosing of the chlorosilane and the silane. Layered compositions include a first layer selected from the group consisting of InxGa1-xAs, InxGa1-xSb, InxGa1-xN, SiGe, and Ge, wherein X is between 0.1 and 0.99, and a second layer, wherein the second layer comprises Si—H and Si—OH.