Four-Layer Silicon Diode Bonding for Uniform Doping Profiles
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Solution Overview
Problem
The existing manufacturing process for silicon drift step recovery diodes (DSRDs) is plagued by mechanical weakness, low yield, non-uniform diffusion, contamination risks, and limited repeatability due to high temperature and long processing times, which result in inconsistent performance and breakdown voltage issues.
Innovation Solution
The process involves out-diffusion of dopants and oxygen from heavily doped wafers using a reducing environment, followed by hydrophilic fusion bonding and subsequent thinning, which eliminates the need for high-temperature in-diffusion steps and allows the use of Czochralski-grown silicon wafers, enabling internal gettering and improved mechanical properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high temperature and long diffusion times are used to achieve thick depletion zone, then breakdown voltage is improved, but manufacturing precision deteriorates due to non-uniform diffusion and mechanical weakness
Solution Approach 1:
The patent applies preliminary action by performing wafer bonding before the diffusion process. This allows the wafer to be mechanically supported by the bonded structure during high-temperature diffusion, preventing warping and non-uniform doping profiles while still achieving the required thick depletion zone for high breakdown voltage.
Solution Approach 2:
The patent segments the manufacturing process into distinct stages: bonding first, then diffusion. This segmentation allows each process to be optimized independently - bonding provides mechanical stability, while diffusion creates the required doping profile, resolving the contradiction between mechanical strength and doping uniformity.
2Ease of operation
If wafer is thinned before diffusion to achieve zero base region thickness, then pulse performance is improved, but mechanical strength deteriorates causing warping and breaking during high temperature processing
Solution Approach 1:
The patent performs bonding as a preliminary action before thinning and diffusion. The bonded wafer structure provides mechanical reinforcement that prevents warping and breaking during subsequent high-temperature processing, while still allowing the base region to be sufficiently thin for good pulse performance.
Solution Approach 2:
The bonding process acts as a cushioning measure before the vulnerable thinning and diffusion steps. The bonded structure serves as a mechanical backup that prevents failure during processing, enabling the use of thin wafers without sacrificing mechanical strength.
3Manufacturing precision
If long diffusion times are used to achieve uniform doping profile, then manufacturing precision is improved, but productivity deteriorates due to extended processing time
Solution Approach 1:
By performing bonding before diffusion, the patent creates a mechanically stable structure that allows for more controlled and efficient diffusion processing. This preliminary stabilization enables achieving uniform doping profiles without requiring excessively long diffusion times, thus improving productivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the yield and quality of DSRDs by reducing slips, achieving uniform doping profiles, and increasing the robustness of the manufacturing process, leading to improved performance and repeatability with higher breakdown voltages and reduced leakage currents.
Implementation Method 1
out-diffusion of dopants and oxygen from heavily doped wafers using a reducing environment
Implementation Method 2
hydrophilic fusion bonding
Data Source
AI summary
A method of producing a four-layer silicon diode, including selecting a first silicon wafer, wherein said first silicon wafer is CZ-grown B-doped with <100> orientation, a resistivity of less than 0.01 Ohm-cm, and an oxygen content of greater than 10 ppma, and then selecting a second silicon wafer, wherein said second silicon wafer is CZ-grown P-doped with <100> orientation, a resistivity of less than 0.005 Ohm-cm, and an oxygen content of greater than 10 ppma, followed by cleaning the respective first and second silicon wafers. The wafers are then HF treated to yield respective first and second cleaned wafers, the first cleaned wafer is positioned into a first furnace and the second cleaned wafer is positioned into a second furnace, wherein the first and second furnaces are not unitary. Next is annealing the respective first and second cleaned wafers in a reducing atmosphere to yield respective first and second respective out-diffused gradient wafers, followed by bonding together respective first and second heat-treated wafers to yield a mated and/or bonded four-layer substrate having a first heavy doped n-type layer, a second gradient doped n-type layer, a third gradient doped p-type layer, and a fourth heavy doped p-type layer.