Ultra-Thin Silicon Dioxide Buffer Layer for Metal Gate Leakage Control
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Solution Overview
Problem
The challenge lies in stably forming an ultra-thin and high-quality silicon dioxide layer as a buffer between high-K gate dielectric layers and silicon substrates, as existing methods like LPCVD and ALD struggle to control thickness and natural oxide layer formation, leading to increased leakage currents and reduced breakdown voltages in MOS transistors.
Innovation Solution
A method involving the formation of a silicon dioxide film on a semiconductor substrate, followed by nitrogen treatment to convert part of the layer into a mixed silicon nitride and oxynitride layer, which is then removed to achieve an ultra-thin silicon dioxide film with controlled thickness and uniformity, combined with subsequent reduction and annealing treatments to enhance etching accuracy and film quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If general LPCVD or ALD is used to form silicon dioxide layer, then the layer can be formed, but the thickness cannot be stably controlled and uniformity is poor
Solution Approach 1:
The patent applies preliminary action by first forming a natural oxide layer on the silicon substrate before performing any CVD or ALD processes. This natural oxide layer serves as a foundation that enables subsequent precise thickness control. The method also performs preliminary nitrogen treatment to convert part of the silicon dioxide layer into a mixed layer, which is then selectively removed to achieve the desired ultra-thin thickness with high precision.
Solution Approach 2:
The patent utilizes parameter changes by controlling the oxidation atmosphere and temperature during the formation process. Specifically, it employs a controlled oxidation environment to form the initial silicon dioxide layer, then uses nitrogen treatment to modify the layer composition. By adjusting process parameters such as temperature, gas flow rates, and treatment durations, the method achieves stable and precise thickness control that cannot be obtained through conventional LPCVD or ALD alone.
2Reliability
If the gate dielectric layer is made thinner to improve electrical performance, then leakage current decreases, but breakdown voltage also decreases
Solution Approach 1:
The patent applies composite materials by creating a multi-layer gate dielectric structure consisting of a silicon dioxide layer combined with a high-K gate dielectric layer. The silicon dioxide layer provides excellent interface quality and low leakage current, while the high-K layer provides high breakdown voltage. This composite structure allows the gate dielectric to simultaneously achieve low leakage current and high breakdown voltage, resolving the contradiction between these two parameters.
Solution Approach 2:
The patent uses beforehand cushioning by introducing an ultra-thin silicon dioxide layer as an interface layer between the silicon substrate and the high-K gate dielectric layer. This interface layer acts as a cushion that protects the channel region from interface states and defects in the high-K material, thereby reducing leakage current before the high voltage stress is applied. The layer prepares the interface in advance to handle the electrical stress that will occur during device operation.
3Manufacturing precision
If an ultra-thin silicon dioxide layer is formed to prevent channel carriers dropping, then threshold control improves, but manufacturing difficulty increases
Solution Approach 1:
The patent uses an intermediary approach by introducing a nitrogen treatment step that converts part of the silicon dioxide layer into a mixed layer of silicon nitride and silicon oxynitride. This mixed layer serves as an intermediary that can be selectively removed through etching, allowing precise control of the final silicon dioxide layer thickness. The intermediary transformation process enables accurate thickness control that would be difficult to achieve through direct formation methods.
Solution Approach 2:
The patent applies segmentation by dividing the silicon dioxide layer formation process into multiple distinct steps: (1) forming an initial thicker silicon dioxide layer, (2) performing nitrogen treatment to create a mixed layer, (3) selectively removing the mixed layer, and (4) forming the final ultra-thin silicon dioxide layer. This segmentation allows each step to be optimized independently, making the overall process more controllable and manufacturable than attempting to form the ultra-thin layer in a single step.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the formation of a controllable and high-quality ultra-thin silicon dioxide film, reducing leakage currents and improving the electrical performance of MOS transistors by maintaining a stable thickness and uniformity, thereby supporting the formation of a functional metal gate structure.
Implementation Method 1
A nitrogen treatment is performed to the silicon dioxide layer, such that the silicon dioxide layer of partial thickness is converted into a mixed layer of silicon nitride and silicon oxynitride
Implementation Method 2
The mixed layer is removed and a silicon dioxide film is formed on the semiconductor substrate
Data Source
AI summary
A method for forming a silicon dioxide film and a method for forming a metal gate are provided. The method for forming a silicon dioxide film includes: forming a silicon dioxide layer on a semiconductor substrate, performing a nitrogen treatment to the silicon dioxide layer to convert the silicon dioxide layer of partial thickness into a mixed layer of silicon nitride and silicon oxynitride; and removing the mixed layer to form a silicon dioxide film on the semiconductor substrate.