Silicon Wafer Epitaxy With In-Situ Dual Doping for Net Doping Precision
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing methods for producing silicon wafers struggle with precise control of electrically active net doping, leading to undesirable variations and increased costs due to segregation coefficients of dopants, making it challenging to achieve low or zero electrically active net doping with high precision.
Innovation Solution
A method involving epitaxial growth of a silicon layer on a carrier substrate with controlled introduction of p-type and n-type dopants to achieve electrically active doping concentrations in the range of 1×10^14 to 1×10^16 cm^-3, allowing for precise management of net doping and reduced material handling complexities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional ingot fabrication processes are used to produce silicon wafers, then manufacturing is simpler and more established, but the segregation coefficients of dopants cause undesirable variations in net doping concentration and make precise control of electrically active net doping difficult
Solution Approach 1:
The patent changes the fundamental parameter of dopant introduction method from post-growth implantation to in-situ incorporation during epitaxial growth. This allows precise control of doping concentration at the atomic level during crystal formation, eliminating segregation effects and enabling accurate control of electrically active net doping concentration.
Solution Approach 2:
The patent replaces the mechanical/physical process of ion implantation and thermal diffusion with a chemical vapor deposition process where dopants are incorporated during epitaxial growth. This substitution enables more precise control through gas flow regulation and temperature management rather than relying on diffusion coefficients and segregation behavior.
2Manufacturing precision
If costly complex procedures are implemented to prevent dopant contamination in the process chamber, then precision of electrically active net doping improves, but manufacturing cost increases significantly
Solution Approach 1:
The patent converts the typically harmful effect of dopant segregation into a benefit by using in-situ doping during epitaxial growth. The controlled introduction of dopants through gas phase allows the segregation effect to be eliminated entirely, while trace contaminants are minimized because the process occurs in a controlled vapor phase environment rather than requiring ultra-clean mechanical handling.
Solution Approach 2:
The patent introduces carrier gases as intermediaries to deliver dopants to the growing silicon layer. These gases act as controlled vehicles that precisely deliver dopant atoms during epitaxial growth, replacing the need for complex contamination prevention measures while maintaining high precision through gas flow control and purification systems.
3Ease of manufacture
If acceptance of lower accuracy in specifying electrically active target doping is chosen, then manufacturing complexity and cost are reduced, but product quality deteriorates
Solution Approach 1:
The patent maintains manufacturing simplicity by using a continuous epitaxial growth process while fundamentally changing the doping mechanism to in-situ incorporation. This allows precise control of dopant concentration through gas flow rates and partial pressures, achieving high accuracy without complex post-growth processing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the production of silicon wafers with high precision and cost-effectiveness, allowing for low electrically active net doping or high-impedance wafers with stable and controlled doping profiles, suitable for large-area electronic components like solar cells and LEDs.
Implementation Method 1
a method involving epitaxial growth of a silicon layer on a carrier substrate
Data Source
Figure 1
AI summary
The invention relates to a method for producing a silicon wafer for an electronic component, having the method step of epitaxially growing of a silicon layer on a carrier substrate and removing the silicon layer as a silicon wafer from the carrier substrate, wherein at least one p-dopant and at least one n-dopant is introduced into the silicon layer during the epitaxial growth. The invention is characterized in that the introducing of the dopant into the silicon layer occurs such that the silicon layer is formed having an electrically active p-doping and an electrically active n-doping, each greater than 1x1014 cm-3.