Silicon Wafer Plasma Etching With Sidewall Protective Layer Cycling

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Solution Overview

Problem

High aspect ratio etching processes in semiconductor manufacturing, such as deep trench silicon etching, often result in rough and uneven sidewalls due to isotropic etching, leading to scallop effects and undercuts, which hinder the miniaturization of integrated circuit components.

Innovation Solution

A method involving alternating main and auxiliary plasma etching processes using specific gas mixtures to generate non-volatile reaction products that form a protective layer, reducing lateral etching and promoting anisotropic etching, with the auxiliary process generating more non-volatile products than the main process to enhance sidewall protection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a high aspect ratio etching process is used to produce finer micro-nano structures, then the size of integrated circuit components can be reduced, but severe lateral etching occurs resulting in rough and uneven sidewall topography

Engineering Contradiction:
Improveetching precisionVSAvoidsidewall smoothness
Core Design Contradiction:
Manufacturing precisionVSShape

Solution Approach 1:

The patent introduces a protective film as an intermediary layer between the etching process and the sidewall. This protective film is formed by non-volatile reaction products that deposit on the sidewall during etching, acting as a mediator that prevents direct isotropic etching of the sidewall while allowing vertical etching to proceed, thereby resolving the contradiction between achieving high aspect ratio etching precision and maintaining sidewall smoothness

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the chemical parameters of the etching process by using a mixed gas system (CF4, O2, HBr) where the proportions and reactions are controlled to generate non-volatile reaction products. By adjusting gas flow rates and process conditions, the formation rate of protective film is optimized to balance vertical etching rate and sidewall protection, resolving the contradiction between etching depth achievement and sidewall quality

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If plasma etching is used to achieve anisotropic etching characteristics, then vertical etching can be improved, but isotropic etching still occurs causing scallop effect on sidewalls

Engineering Contradiction:
Improvevertical etching rateVSAvoidscallop effect
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The patent converts the harmful isotropic etching effect into a beneficial protective mechanism. The same plasma that causes isotropic etching also generates non-volatile reaction products (SiO2, SiBr2O, etc.) that deposit on the sidewall to form a protective film. This transforms the harmful lateral etching into a beneficial sidewall protection mechanism, resolving the contradiction between achieving vertical etching precision and avoiding scallop effect

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent implements periodic alternation between etching phases and protective film formation phases. During etching, vertical removal occurs; during protective film formation, non-volatile reaction products accumulate on sidewalls. This periodic cycling between etching and protection resolves the contradiction by ensuring that whenever vertical etching progresses, sidewall protection is simultaneously maintained

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly improves sidewall smoothness, reduces scallop effects, and suppresses undercuts, facilitating better gate oxide growth and polysilicon filling, while maintaining efficient etching depth progression.

Implementation Method 1

a main etching process using a first mixed gas to perform a plasma etching process to etch the silicon wafer

Methodology Applied
Scientific EffectPlasma: Plasma

Implementation Method 2

the first mixed gas being configured to etch silicon and react with silicon to form non-volatile reaction products

Methodology Applied
Scientific EffectChemical reaction: Chemical Bonding

Data Source

PatentUS20240006182A1Method for etching silicon wafer
Publication Date: 2024.01.04 BEIJING NAURA MICROELECTRONICS EQUIP CO LTD
  • US20240006182A1 patent drawing
  • US20240006182A1 patent drawing
  • US20240006182A1 patent drawing

AI summary

A method for etching a silicon wafer includes: a main etching process using a first mixed gas to perform a plasma etching process to etch the silicon wafer until a pattern on the silicon wafer reaches a specified aspect ratio, the first mixed gas being configured to etch silicon and react with silicon to form non-volatile reaction products; and an auxiliary etching process using a second mixed gas to perform another plasma etching process, the second mixed gas being configured to react with silicon to generate the non-volatile reaction products, and a formation rate of the non-volatile reaction products in the auxiliary etching process being greater than a formation rate of the non-volatile reaction products in the main etching process. The main etching process and the auxiliary etching process are alternately performed at least once until the pattern on the silicon wafer reaches a specified etching depth.