Silicon Fin Capping Layer to Prevent Isolation Oxidation
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Solution Overview
Problem
Fin oxidation during the formation of isolation regions in fin field effect transistors (finFETs) leads to fin width loss, resulting in transistor performance degradation and yield loss, particularly in silicon-germanium fin structures.
Innovation Solution
A crystalline silicon capping layer is deposited on the top surfaces of fin structures to prevent oxidation during the formation of fin isolation regions, with a thickness of about 2 nm to ensure protection without degrading transistor performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fin structures are formed without a capping layer, then the fabrication process is simpler, but fin oxidation occurs during isolation region formation leading to fin width loss
Solution Approach 1:
A crystalline silicon capping layer is deposited on the fin structures before the formation of isolation regions. This preliminary protective action prevents fin oxidation during subsequent processing steps, thereby maintaining fin width stability and preventing performance degradation.
Solution Approach 2:
The crystalline silicon capping layer acts as an intermediary protective barrier between the fin structure and the oxidizing environment during isolation region formation. This intermediate layer prevents direct contact between oxygen and the fin surface, eliminating the harmful oxidation effect while allowing the fabrication process to proceed.
2Reliability
If a thick capping layer is deposited to prevent oxidation, then fin protection is improved, but transistor performance degrades
Solution Approach 1:
The thickness of the crystalline silicon capping layer is precisely controlled at approximately 2 nm. This optimized parameter provides sufficient protection against fin oxidation while being thin enough to prevent degradation of transistor performance, thus resolving the contradiction between protection and performance.
Solution Approach 2:
The capping layer is applied selectively only where needed on the fin structures, with precise thickness control. This localized quality approach ensures adequate protection at the fin surface while maintaining the overall transistor performance by avoiding excessive material deposition that would degrade device characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The crystalline silicon capping layer effectively prevents fin oxidation, reducing defects and maintaining fin width, thereby improving transistor performance and yield by relocating weak points away from the fin surfaces.
Implementation Method 1
a first crystalline silicon layer is epitaxially grown on the fin structures as a capping layer to prevent fin oxidation
Data Source
AI summary
The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.