Silicon High-Voltage Capacitor with Recessed Ferroelectric Dielectric
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Solution Overview
Problem
High-voltage ceramic capacitors in power electronics suffer from poor heat dissipation and low AC voltage load capacity due to their multi-layered structure, requiring oversized capacitance to compensate, and existing silicon capacitors face reliability issues with high dielectric layer thicknesses.
Innovation Solution
A high-voltage capacitor with a silicon layer featuring recesses coated with a dielectric layer sequence of ferroelectric or anti-ferroelectric material, where the silicon layer is separated by a thermal SiO2 layer to prevent interface states, and additional dielectric layers like SiO2 or Si3N4 are used for increased reliability and electric strength, allowing for good heat dissipation and high integration density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-layer ceramic capacitors with high dielectric constant materials are used to achieve high capacitance in small space, then integration density is improved, but heat dissipation capability deteriorates
Solution Approach 1:
The patent employs a composite structure combining silicon substrate with thermal conductivity enhancements, metal interdigitated electrodes, and dielectric layers. This composite approach achieves high capacitance density while improving heat dissipation through the silicon substrate's inherent thermal conductivity and metal electrode pathways, resolving the contradiction between compact integration and thermal management.
2Reliability
If dielectric layer thickness is increased to improve reliability, then breakdown resistance is improved, but interface states and defects increase
Solution Approach 1:
The patent introduces an intermediate thermal silicon dioxide layer between the silicon substrate and the primary dielectric layer. This intermediary layer serves as a buffer that prevents direct interface state formation between the thick dielectric and silicon, while still allowing the dielectric layer to achieve sufficient thickness for breakdown resistance. The thermal oxide acts as a mediator that decouples the conflicting requirements of thickness and interface quality.
3Power
If AC voltage load capacity is increased, then power handling capability is improved, but capacitance value must be oversized
Solution Approach 1:
The patent optimizes multiple parameters simultaneously: using high dielectric constant materials increases capacitance density, while the metal interdigitated electrode configuration and thermal conductivity enhancements improve AC voltage load capacity. By changing these parameters in combination rather than relying on oversized capacitance, the design achieves both high power handling and compact size.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves high integration density, reliability, and effective heat dissipation, enabling the capacitor to handle high voltages with capacitance values over 200 nF, suitable for power modules with improved economic viability and reduced defect density.
Implementation Method 1
a layer of thermal SiO2 is formed between the silicon layer and the dielectric layer or layer sequence
Implementation Method 2
the dielectric layer or layer sequence has a layer thickness of ≥1000 nm, and the dielectric layer or layer sequence is formed of a ferroelectric or anti-ferroelectric material
Data Source
AI summary
A high-voltage capacitor for integration into electrical power modules has a silicon layer into which an arrangement of recesses is introduced on a front face. The front face with the recesses is coated with a dielectric layer or dielectric layer sequence, wherein the recesses are filled with an electrically conductive material. The silicon layer bears a contact metallisation on the front face and the rear face for purposes of making electrical contact with the capacitor. A layer of thermal SiO2 is formed between the silicon layer and the dielectric layer or layer sequence. The dielectric layer or layer sequence has a layer thickness of ≥1000 nm and is formed from a ferroelectric or anti-ferroelectric material. The proposed high-voltage capacitor features a high integration density with a high capacitance and good heat dissipation properties.