Silicon Interposer Sandwich Shielding for Dense 3D IC Packaging

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Solution Overview

Problem

Current 3D packaging technologies fail to effectively miniaturize electronics while providing adequate protection against Electrostatic Discharge (ESD), Electromagnetic Interference (EMI), and Electromagnetic Compatibility (EMC) without compromising the scale of integration, as existing shielding methods require larger structures and separate packages for individual devices.

Innovation Solution

A sandwich structure of interposers with metallized shielding and diode protective devices is used, where TSVs connect the interposers to ground or voltage, allowing for miniaturized localized shielding and enabling multiple integrated circuit devices to be placed adjacent to each other on the same interposer, maintaining miniaturization and providing ESD, EMI, and EMC protection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional shielding structures with base plates, lids, and gaskets are used to protect integrated circuit devices from ESD, EMI, and EMC, then protection effectiveness is improved, but device size and structural complexity increase significantly

Engineering Contradiction:
Improveprotection effectivenessVSAvoidstructural complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the shielding function into multiple thin interposer layers (first interposer, second interposer, third interposer) rather than using a single monolithic shielding structure. Each interposer contains conductive elements that provide specific shielding functions, allowing the overall shielding system to be distributed and integrated within the 3D packaging structure itself.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements nesting by placing conductive shielding elements within the interposer layers that are themselves nested between integrated circuit devices. The first interposer is positioned between the first device and second device, the second interposer between the second device and third device, creating a nested arrangement where shielding structures are embedded within the packaging hierarchy.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If traditional shielding structures with base plates, lids, and gaskets are used to protect integrated circuit devices from ESD, EMI, and EMC, then protection effectiveness is improved, but the desired miniaturization is compromised

Engineering Contradiction:
Improveprotection effectivenessVSAvoiddevice size
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

The patent transitions from traditional 2D planar shielding structures to a 3D vertical arrangement where thin interposer layers are stacked between devices. The shielding function is achieved through multiple thin layers in the vertical dimension rather than large lateral extensions, enabling miniaturization while maintaining protection effectiveness.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent uses thin interposer films/layers (first interposer, second interposer, third interposer) as flexible shielding structures instead of rigid base plates and lids. These thin interposer layers can be integrated within the compact 3D packaging volume without requiring the bulky traditional shielding enclosures.

Inventive Principle:
Principle #30Flexible shells and thin films

3Productivity

If multiple integrated circuit devices are placed on the same interposer to enhance functional proximity and miniaturization, then device density is improved, but isolation from ESD, EMI, and EMC factors deteriorates

Engineering Contradiction:
Improvedevice densityVSAvoidisolation from ESD, EMI, EMC
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent segments the space between multiple integrated circuit devices by inserting conductive interposer layers (first interposer, second interposer, third interposer) between adjacent devices. This segmentation creates electrical isolation barriers that protect each device from ESD, EMI, and EMC while allowing the devices to remain in close proximity for enhanced functional integration.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively shields and protects integrated circuit devices in 3D packaging from ESD, EMI, and EMC while preserving miniaturization, allowing for closer device placement and efficient heat dissipation, thus enhancing the scale of integration and reducing the need for larger shielding structures.

Implementation Method 1

metallized shielding and diode protective devices may be incorporated into both the top and bottom interposers

Methodology Applied
Scientific EffectElectromagnetic shielding: Faraday Cage

Implementation Method 2

protected against Electrostatic Discharge (ESD), Electromagnetic Interference (EMI), and Electromagnetic Conductivity (EMC)

Methodology Applied
Scientific EffectElectrostatic discharge protection: Electrostatic Discharge

Implementation Method 3

TSV's would allow interconnection of the metallized shielding to ground or voltage as required electrically

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 4

allowing efficient dissipation of heat

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS11810893B2Silicon interposer sandwich structure for ESD, EMC, and EMC shielding and protection
Publication Date: 2023.11.07 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11810893B2 patent drawing
  • US11810893B2 patent drawing

AI summary

An interposer sandwich structure includes a top interposer and a bottom interposer enclosing an integrated circuit electronic device that includes an attachment for attaching the device to the bottom interposer, and an interconnection structure connecting the top interposer to the bottom interposer. The top interposer may also be directly connected to a chip carrier in addition to the bottom interposer. The structure provides shielding and protection of the device against Electrostatic Discharge (ESD), Electromagnetic Interference (EMI), and Electromagnetic Conductivity (EMC) in miniaturized 3D packaging.