Silicon Layer Deposition via Phosphorus Precursor and Plasma
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Solution Overview
Problem
There is a need for silicon-containing materials with excellent conformality, low dielectric constant, low leakage, and excellent wet etch resistance, particularly for use in low-temperature processes suitable for 3D integrated circuits.
Innovation Solution
A method for depositing a silicon-containing layer on a substrate using a reaction chamber, involving the provision of a phosphorus-containing precursor and a nitrogen-containing reactive species, which together form a silicon-containing layer with specific properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional silicon deposition methods are used, then silicon layers can be formed, but conformality deteriorates and material properties are insufficient for advanced 3D integration
Solution Approach 1:
The patent changes the chemical parameters of the deposition process by using organometallic silicon precursors with specific molecular structures (e.g., silane, methylsilane, ethylsilane) and controlling deposition temperature (200-400°C), pressure, and gas flow rates to achieve both high conformality and superior material properties required for 3D integration
Solution Approach 2:
The patent employs composite deposition approaches by combining organometallic silicon precursors with other materials to form composite silicon-containing layers that exhibit enhanced conformality, dielectric constant, resistivity, and wet etch resistance simultaneously
2Reliability
If high-temperature processes are used, then material properties improve, but process temperature exceeds the limit of at most 400°C for low-temperature processing
Solution Approach 1:
The patent changes the chemical composition parameters of the precursor materials to organometallic compounds that enable low-temperature reactivity, allowing deposition at 200-400°C while achieving material properties that would normally require higher temperatures, thus resolving the contradiction between temperature and material quality
3Reliability
If standard deposition processes are used, then silicon layers can be deposited, but wet etch resistance is insufficient
Solution Approach 1:
The patent modifies the chemical parameters by selecting specific organometallic precursors and controlling deposition conditions to create silicon layers with enhanced wet etch resistance, accepting increased process complexity as necessary to achieve the required material performance for advanced semiconductor devices
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method achieves a silicon-containing layer with high conformality, low dielectric constant, low leakage, and excellent wet etch resistance, suitable for use in low-temperature processes for 3D integrated circuits.
Implementation Method 1
A method for depositing a silicon-containing layer on a substrate using a reaction chamber, involving the provision of a phosphorus-containing precursor and a nitrogen-containing reactive species
Implementation Method 2
the reactive species is generated by a plasma from a reactant
Data Source
AI summary
Disclosed are methods and systems for forming a silicon-containing layer on a substrate. Further disclosed are composition and synthesis of silicon-containing precursor. The methods for forming a silicon-containing layer comprise executing a plurality of deposition cycles. A deposition cycle comprises a first precursor pulse that comprises exposing the substrate to a first precursor. The first precursor comprises a molecule comprising a P—Si bond. A deposition cycle further comprises a plasma pulse that comprises exposing the substrate to a plasma treatment. The plasma treatment comprises generating a plasma.