Silicon Layer Prevents Piping in Semiconductor Silicidation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In the miniaturization of semiconductor devices, the formation of metal silicide layers during silicidation processes often results in defects such as 'piping' where metal atoms penetrate the source/drain features, leading to current leakage and contact-etch-through issues due to the thinning or loss of silicon-containing material, especially at advanced process nodes.
Innovation Solution
A Si-containing layer is formed over the source/drain features before silicidation to prevent metal penetration and replenish lost silicon, ensuring a sufficient metal silicide layer is formed, thereby reducing defects and enhancing device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If miniaturization process is advanced to smaller device nodes, then device size and power consumption are improved, but piping defects and current leakage occur due to metal penetration through thinned source/drain features
Solution Approach 1:
A silicon-containing layer is formed over the source/drain features before the silicidation process to prevent metal penetration. This preliminary protective layer is deposited at a thickness sufficient to block metal atoms during subsequent silicidation, thereby preventing piping defects and current leakage while enabling continued miniaturization
Solution Approach 2:
The silicon-containing layer acts as an intermediary barrier between the metal layer and the source/drain features. During silicidation, this intermediate layer prevents direct contact and penetration of metal atoms through the thinned source/drain features, eliminating the piping effect while still allowing formation of adequate metal silicide
2Length of moving object
If source/drain features are thinned during miniaturization, then device density is improved, but metal penetration and piping defects occur during silicidation
Solution Approach 1:
The silicon-containing layer is deposited beforehand to compensate for the thinned source/drain features. This preliminary layer ensures that even when source/drain features are thin, there is sufficient silicon material available during silicidation to prevent metal penetration and piping defects
Solution Approach 2:
The silicon-containing layer is selectively formed only over the source/drain features where penetration risk exists. This localized approach provides enhanced silicon supply precisely where needed during silicidation, preventing piping defects without affecting other device regions
3Speed
If silicidation process is performed on thinned source/drain features, then device speed and functionality are improved, but contact-etch-through issues and piping defects occur
Solution Approach 1:
The silicon-containing layer serves as a protective intermediary that prevents metal atoms from penetrating the source/drain features during silicidation. This intermediary layer eliminates piping defects and contact-etch-through issues while allowing the silicidation process to proceed, maintaining device speed and functionality
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents piping defects and contact-etch-through issues, improving device performance and increasing production yield by maintaining sufficient silicon for effective silicidation and reducing the risk of current leakage.
Implementation Method 1
The Si-containing layer reacts with a metal layer during the silicidation process to form a metal silicide layer
Data Source
AI summary
A semiconductor device includes an isolation feature in a substrate. The semiconductor device further includes a first source/drain feature in the substrate, wherein a first side of the first source/drain feature contacts the isolation feature, and the first source/drain feature exposes a portion of the isolation feature below a top surface of the substrate. The semiconductor device further includes a silicide layer over the first source/drain feature. The semiconductor device further includes a dielectric layer along the exposed portion of the isolation feature below the top surface of the substrate, wherein the dielectric layer contacts the silicide layer. The semiconductor device further includes a second source/drain feature in the substrate on an opposite side of a gate stack from the first source/drain feature, wherein the second source/drain feature has a substantially uniform thickness.