Silicon-Metallic-Silicon Stacking Structure for Semiconductor Die Stress Reduction
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Solution Overview
Problem
The semiconductor industry faces challenges in minimizing the size of semiconductor dies, particularly in Wafer Level Chip Scale Packages (WLCSP), where the thin substrate causes bending and stress due to backside grinding, complicating subsequent packaging processes.
Innovation Solution
A semiconductor die with a stacking structure of silicon-metallic conductive layer-silicon is introduced, eliminating the need for backside grinding by establishing a bidirectional current path through the metallic conductive layer, which reduces stress and enables thinner semiconductor layers, facilitating easier packaging and integration with other chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the substrate is ground to be very thin (less than 200 μm) to reduce package size, then the package size is minimized, but the substrate causes bending phenomenon and stress on the semiconductor die
Solution Approach 1:
The substrate is divided into two separate semiconductor layers (first and second semiconductor layers) with a metallic conductive layer in between. This segmentation allows each layer to be thinner and less prone to bending, while the metallic layer provides structural support to maintain overall stability.
Solution Approach 2:
A composite structure is formed by combining two semiconductor layers with a metallic conductive layer between them. This composite structure reduces the thickness of individual semiconductor layers (eliminating the need for backside grinding) while the metallic layer provides mechanical support to prevent bending and stress.
2Reliability
If a back metal layer is formed on the back side of the thin substrate to improve electrical characteristics, then electrical performance is enhanced, but the manufacturing process becomes more complex and costly
Solution Approach 1:
Instead of forming a back metal layer on the back side of a thin substrate (conventional approach), the patent inverts the structure by placing a metallic conductive layer between two semiconductor layers. This eliminates the need for backside grinding and back metal layer formation, simplifying the manufacturing process while maintaining electrical performance.
Solution Approach 2:
The metallic conductive layer positioned between the two semiconductor layers serves multiple functions: it acts as a drain electrode for both power semiconductor devices, provides mechanical support to prevent substrate bending, and establishes bidirectional current paths. This multi-functionality eliminates the need for separate back metal layers and complex manufacturing steps.
3Volume of moving object
If the substrate thickness is reduced to achieve chip-scale packaging, then packaging size is minimized, but subsequent packaging processes become difficult to conduct
Solution Approach 1:
The substrate is segmented into two separate semiconductor layers, each with thickness less than or equal to about 20 μm. This segmentation allows the individual layers to be thin enough for chip-scale packaging while the combined structure with the metallic layer maintains sufficient mechanical strength for subsequent packaging processes.
Solution Approach 2:
The composite structure of two thin semiconductor layers with a metallic conductive layer provides both the thinness required for chip-scale packaging and the mechanical strength needed for subsequent packaging processes, eliminating the difficulty associated with handling extremely thin substrates.
4Stability of the object's composition
If a stacking structure with metallic conductive layer is used to eliminate backside grinding, then stress on the semiconductor die is reduced, but the device structure becomes more complex
Solution Approach 1:
The metallic conductive layer positioned between the two semiconductor layers performs multiple functions simultaneously: it serves as a drain electrode for both power semiconductor devices, provides mechanical support to eliminate substrate bending and stress, and establishes bidirectional current paths. This multi-functionality reduces stress without significantly increasing structural complexity.
Solution Approach 2:
The drain electrodes of both power semiconductor devices are merged into a single metallic conductive layer. This merging simplifies the overall structure by eliminating the need for separate back metal layers and complex interconnections, while still providing mechanical support and stress reduction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for a reduction in on-state resistance and eliminates the need for backside grinding, thereby decreasing stress on the semiconductor die and enhancing its integration capabilities with other chips, while maintaining superior electrical characteristics.
Implementation Method 1
a metallic conductive layer between the first semiconductor layer and the second semiconductor layer... establishing a bidirectional current path through the metallic conductive layer
Data Source
AI summary
The description relates to a semiconductor die having a stacking structure of silicon-metallic conductive layer-silicon, and the semiconductor die according to embodiments includes a stacking structure of first semiconductor layer-metallic conductive layer-second semiconductor layer, and first and second power semiconductor devices in the first semiconductor layer, in which the first power semiconductor device includes a first source bump and a first gate bump, first trench gate electrodes under the first source bump, and a first channel among the plurality of first trench gate electrodes, in which the second power semiconductor device includes a second source bump and a second gate bump, second trench gate electrodes under the second source bump, and a second channel among the plurality of second trench gate electrodes, and in which the metallic conductive layer includes a metal layer.