Digital Silicon Microphone Interpolation for Multi-Rate Low-Power Audio
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Solution Overview
Problem
Conventional digital microphone systems are not power efficient due to electronic components consuming more power at higher frequencies, and their design must accommodate the highest clock rate, making them inefficient for multiple sampling frequencies.
Innovation Solution
A digital microphone interface circuit with a delta-sigma ADC, digital lowpass filter, and digital sigma-delta modulator configured to operate at different sampling frequencies, allowing components to work at reduced frequencies for improved power and area efficiency, and using interpolation and decimation filters to adjust sampling frequencies as needed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the digital microphone system is designed to operate at the highest clock rate to support multiple sampling frequencies, then the system can accommodate various audio applications, but the power consumption increases significantly
Solution Approach 1:
The patent implements dynamic frequency scaling where the ADC, digital filter, and modulator can operate at different sampling frequencies based on the specific audio application requirements. The system dynamically adjusts the operating frequency of each component rather than running all components at the maximum frequency, thereby reducing power consumption while maintaining support for multiple sampling frequencies.
Solution Approach 2:
The system changes the operating parameters (sampling frequencies) of different components independently. The ADC operates at a first sampling frequency, the digital filter at a second sampling frequency, and the modulator at a third sampling frequency, allowing each component to operate at optimal power levels while maintaining overall system versatility.
2Measurement precision
If the sampling frequency is increased to improve audio signal processing performance, then the signal quality improves, but the power consumption of electronic components increases
Solution Approach 1:
The patent applies different sampling frequencies to different components based on their specific requirements. The ADC uses a higher sampling frequency for accurate audio capture, while the digital filter and modulator may use lower frequencies suitable for their processing functions, optimizing both performance and power consumption locally at each component.
Solution Approach 2:
The system dynamically adjusts the sampling frequency of each component based on the actual audio processing needs. When high-fidelity audio processing is required, higher sampling frequencies are used; for less demanding applications, lower frequencies reduce power consumption while maintaining adequate performance.
3Speed
If the ADC settling time is reduced to increase sampling frequency, then the sampling rate increases, but more power is consumed to achieve the faster settling
Solution Approach 1:
The system dynamically adjusts the ADC sampling frequency based on the audio application requirements rather than operating continuously at maximum frequency. This allows the ADC to use longer settling times at lower sampling frequencies when high-speed sampling is not needed, significantly reducing power consumption while maintaining the capability for high-speed operation when required.
Data Source
AI summary
In accordance with an embodiment, a digital microphone interface circuit includes a delta-sigma analog-to-digital converter (ADC) having an input configured to be coupled to a microphone, a digital lowpass filter coupled to an output of the delta-sigma ADC, and a digital sigma-delta modulator coupled to an output of the digital lowpass filter. The delta-sigma ADC, the digital lowpass filter, and the digital sigma-delta modulator are configured to operate at different sampling frequencies.